资源列表
TimeCiir
- 利用RTC的增量功能进行1S的定时，当定时时间到时，取反蜂鸣器控制I/O。-The use of RTC functions 1S incremental timing, when the regular time when the buzzer take control of anti-I/O.
UniversalRegister
- 这种设计是一个普遍的登记册可作为一个简单的存储登记，双向移位寄存器，计数器的行动和反跌。登记册可以载入了一套并行数据输入和模式是由3位输入。-This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter. The register can be
ddspsk
- 产生13位barker码，还有2spk信号产生-13-bit barker code, 2spk signal generation
PROG17
- microcontroller based control store system
honglvdengkongzhi
- 这是描述红绿灯控制的程序，不是太复杂，是很简单的一个程序。-This is described in traffic light control procedures, not too complicated, it is a very simple procedure.
vga_dis
- 3位的VGA驱动的verilog代码 值得学习 -3 of the VGA driver is worth learning verilog code
Ultrasonik_SRF04_AT89S51_KEIL7
- SRF04 ultra sonic sensor AT89S51 C source code using Keil Vision 7.
prog-1-store-byte
- 8051 souce code to store byte in the memory.-8051 souce code to to store byte in the memory.
Median-Module
- Median Module VHDL code
PHA
- Verilog编写的两路信号的相位测量相关内容，可计算两路信号的相位差，及当前频率-Verilog prepared by the two-way signal phase measurements related content, calculate the phase difference between two signals, and the current frequency
encoder
- The code for 8 to 3 encoder is written in Verilog language.
qpsk
- QPSK数字的Verilog调制器的设计和实现-Design and Implementation of Verilog Modulator for QPSK Digital