资源列表
ofdm_signal
- Matlab code for generating an OFDM signal.
Channel_estimation_program
- 信道估计程序，源代码和说明文档-Channel estimation procedure, the source code and documentation. . . . . . . . . . . . . . . . . . .
MATLAB
- 本程序用以仿真块状导频时不同信噪比条件下的误码率和均方误差，信道估计采用最小二乘法和改进的最小二乘法。 -The pilot program for the simulation block different SNR when the bit error rate and mean square error channel estimation using the least square method and the improved least square method.
cubicsplineinterpolaton
- 本程序是关于三次样条差值算法的仿真，内容非常详细，希望能需要他的人有所帮助。-This program is on the cubic spline difference algorithm simulation, the content is very detailed, hope to those who need his help.
td-scdma_Rayleigh-channel_joint-detection
- TD-SCDMA，1基站1单天线用户系统，瑞利多径信道，联合检测（JD）matlab程序-TD-SCDMA, 1 single-antenna base station a user system, Rayleigh multipath channel, joint detection (JD) matlab program
TD-SCDMA_capture_DwPTS
- TD-SCDMA中初始同步捕捉DwPTS下行同步导频时隙的仿真-TD-SCDMA downlink in the initial synchronization to capture DwPTS pilot slot in the simulation of synchronous
TD-SCDMA_transceiver_system_modeling_simulation_of
- TD-SCDMA收发系统建模，联合检测仿真-TD-SCDMA transceiver system modeling, simulation of joint detection
td-scdma_with_multi-users_detection
- 在以往的关于多用户检测程序，给出的多是针对CDMA系统的。出于长期以来笔者对TD-SCDMA系统应用研究，在这里我进行了一些修改-In previous procedures on the multi-user detection, given mostly for the CDMA system. For a long time writer on the TD-SCDMA system application, where I made some changes
wcdma_ul_and_dl_simulation
- 基于3G标准wcdma的上下行通信链路，基于3GPP协议，采用matlab simulink的仿真-Up and down based on 3G standards wcdma line communication link, based on 3GPP protocol, using matlab simulink simulation
UIM_card
- CDMA的UIM卡的说明，对uim卡的流程做了简单介绍-CDMA-UIM card shows the flow of the uim card gives a brief introduction
channel_case3
- 用matlab实现多径瑞利信道，详细参数程序内有注释说明-Using matlab to achieve multi-path Rayleigh channel, detailed explanatory notes within the parameters of procedures
DDFS_verilog
- 直接数字频率综合器，采用ROM压缩法，经过FPGA验证和AISC实现-Direct digital frequency synthesizer, using ROM compression method, validation and AISC through FPGA Implementation