资源列表
rate
- 一个通过降低精度提高运算速度的8bit加法器设计，仅供参考-A improve processing speed by reducing the accuracy 8bit adder design, for reference only
sj
- 此文件为matlab的simulink仿真简单通信模型，使用高斯信道，包括信源编码、信道编码、成型滤波、带通调制等等模块-This file is a simple communication matlab simulink simulation model using Gaussian channel, including source coding, channel coding, shaping filter, band-pass modulation module etc.
ISO15118
- ISO15118 protocol stack for EV
ISO15118_Debug
- ISO15118 source for protocol Debug
ISO15118_Release
- ISO15118 source for Release protocol
Slide
- 北航与慕尼黑工业大学 飞行器课件 讲解四轴飞行器的空气动力学模型，位姿控制PID -Northern Technical University of Munich and courseware to explain Quadcopter aircraft aerodynamic model, pose PID control
CF2.0
- 国外著名小四轴飞行器Crazyflie 2.0原理图，可以参考其制作pcb-Famous small Quadcopter Crazyflie 2.0 schematics, refer to its production pcb
myCrazyfile
- 小四轴PCB外形图，PcbDoc文件，可直接在其内部布置元件，制版。-Small axis PCB outline drawing, PcbDoc file, arrangement of elements, the plate directly in its interior.
quadrotor-file-
- 台湾的一个作者撰写的四旋翼制作过程文档。这是一个设计四旋翼总体的一个教程。-Quad-rotor designed by an author Taiwan。It is a tutorial file
vlsi-design1
- 8-bit双向循环移位电路-vlsi（组合逻辑门）-VLSI-homework design
vlsi-design2
- 一位8421BCD编码的十进制数加减法器，电路具有进位、借位功能-A 8421BCD encoding decimal adder subtracter circuit has the function, carry out.
vlsi-design3
- 电路具有四路4_bit字宽的串行输入总线，四路4_bit字宽的输出总线信号的电路。 电路完成将串行输入信号A[3..0]、B[3..0]、C[3..0]、D[3..0]（大小排列无序）以数值大小排序输出的功能，输出X3[3..0]、X2[3..0]、X1[3..0]、X0[3..0]中X3最大，X0最小。输入数据是无符号整数。 -Circuit with four 4_bit word wide serial input bus, four 4_bit word wide output