资源列表
sp6_UART_TEST
- sparant6工程， UART loopback测试实例，接收PC端发送的UART数据，原数据返回给PC端，即loopback功能。 -The project of sparant6，UART loopback test example, the receiving UART sends data PC, the original data back to the PC side, the loopback unction.
XEP100---ECT-500us-period---CW47
- MC9S12XEP100 定时器例程-MC9S12XEP100 ECT timer。。。。
XEP100---ATD-and-PIT---CW47
- MC9S12XEP100 ATD和PIT例程-MC9S12XEP100 ATD and PIT。。。
SW-XEP100-PLL-Setup-CW47
- MC9S12XEP100 PLL时钟配置例程-MC9S12XEP100 PLL setup
SW-XEP100-PFLASH-CW47
- MC9S12XEP100 flash 例程-MC9S12XEP100 flash
XEP100-CAN
- MC9S12XEP100 CAN通信例程-MC9S12XEP100 CAN
XEP100---PWM-8bit---CW45
- MC9S12XEP100 PWM例程-MC9S12XEP100 PWM
STM8-I2C-Driver
- STM8S103F3 I2C硬件从机驱动程序-STM8 I2C Driver
calendar
- 使用12864液晶屏显示，具有万年历、时钟、闹钟、节日提醒等功能-display by liquid crystal (128*64) , perpetual calendar、clock、alarm clock、Remind the festival
Uart
- 基于C51的串口的一个出来通信数据的案例-base on C51 uart for communication
Altera-FPGA_CPLD-design-Advanced
- 《Altera FPGA_CPLD设计 高级篇》详细介绍FPGA应用于高级特性，LogicLock设计，时序约束，设计优化，高级工具及系统级设计技术，是深入学习FPGA的重要材料-" Altera FPGA_CPLD advanced part design" details FPGA used in advanced features, LogicLock design, timing constraints, design optimization, system-leve
Simple-stepping-motor
- 可以适用于所有步进电机加减速，这个是我从X宝上购买回来的，希望能和大家一起分享！-Can be applied to all stepper motor acceleration and deceleration, this is my purchase X treasure back, and hope to share with you!