资源列表
实验15：串口通信
- SBUF串口通信 输入输出寄存器，倍增波特率4800，实现波特率9600(SBUF serial port communication input-output register, doubling the baud rate 4800, realizing the baud rate 9600)
Xilinx的增量编译技术
- 增量编译技术，其基本原理就是根据前一次编译的结果，只重新编译部分修改过设计，其它部分则沿用前一次编译的结果，这样就可以缩短总体的编译时间(Incremental compilation technology, the basic principle is based on the results of the previous compilation, only re-editing part of the modified design, the other part is based on
ad568x_generic
- ad568x初始化与I2S、SPI通信通用驱动(Initialization of ad568x, and drivers for SPI, I2S communication)
ad5684r_rl78g13
- AD568X 与rl78g13通信、实现DAC功能。ST7579 LCD驱动。(RL78G13-controlled AD568X dac driver, with ST7579 LCD drivers.)
简单四位时钟
- 简单四位时钟是单片机初学者的一个实用的C语言程序(Simple four-bit clock is a beginner C language practical C program)
DACVHAL
- D / A conversion chip driver code, you can achieve a variety of waveform output. The code is easy to understand
(已封装)矩阵键盘
- 矩阵键盘与LCD结合实现123456789ABC(Matrix keyboard and LCD combined to achieve 123456789ABC)
TLV1544 C
- 4通道10位AD转换芯片驱动代码，亲测通过。(4 Channel 10 bit AD conversion chip driver code, pro - Measurement through.)
elevator
- 电梯运行的控制系统，FPGA实现，基于Verilog(Control system of elevator operation)
ADC_Data_Recv_Module
- 接收机测试输入信号， 生成正余弦波，采样率、频率、幅度、相位可调节 并将生成的数据进行输出 压缩包包括Verilog代码、testbench代码、word文档 matlab仿真代码(The receiver tests the input signal, Generation of positive cosine wave, sampling rate, frequency, amplitude, phase can be adjusted And output the generated da
CCS及DSP_BIOS的原理
- 本书详细介绍了CCS的使用方式，并对DSP的启动、运行及调试做了非常深刻的说明。(This book introduces the use of CCS in detail, and gives a very deep explanation of the start, operation and debugging of DSP.)
Clock_Synchronization_Module
- 数字接收机中频部分数字时钟的设计 包括matlab仿真 verilog代码、 testbench代码 以及word设计文档(Design of medium frequency digital clock in digital receiver Including Matlab simulation Verilog, testbench code, and design documents)