资源列表
2
- VHDL代码，一些课本的小程序。包含3线-8线译码器，4选1选择器，6层电梯，8线-3线编码器，8线-3线优先编码器，8选1，BCD-7段显示译码器真值表，半加器，摩尔状态机，数字时钟，序列检测器的设计，一般状态机等等。(VHDL code, some textbooks for small programs. It includes 3 line -8 line decoder, 4 selector 1 selector, 6 elevator, 8 line -3 encoder, 8 l
在HI3531上移植和运行QT4.8.6
- 在海思 HI3531上移植和运行QT4.8.6的教程文档(HI3531 QT4.8.6 linux)
led yakma
- Arduino led control Code sample
stm32f407_ESP8266-master1
- 基于STM32F4 和 ESP8266 通过WIFI和ThinkSpeaker进行通信，传输数据(Communication based on STM32F4 and ESP8266 through WIFI and ThinkSpeaker, transmission of data)
project.map
- D Flip Flop for Single Bit Store
AhuFirstCar
- 飞思卡尔智能车比赛代码，很有帮助的。。。。(Carle smart car race code .It's helpful.)
MyHID
- 实现stm32和上位机利用USB HID类进行通讯(Realizing STM32 and PC using USB HID class for communication)
3.12TIM1_4PWM
- STM32利用高级定时器TIM1，产生4路PWM波，并且波形两两互补(STM32 uses the advanced timer TIM1 to produce 4 PWM waves, and the waveform is 22 complementing.)
Icarus-master
- Icarus bitcoin fpga code for ZTEX
seg
- 基于verilog语言的74HC595程序,适用于驱动单个四位数码管(Four bit digital tube driver)
uart
- uart串口FPGA实现示例 example(uart serial interface example)
random_check
- 随机码流中的报文捕捉器，Verilog编写，本报文捕捉器用于记录报文中数字信号“1”的个数。当报文捕捉器检测到随机码流中出现“1101”的序列后，确认为报头，并开始对后续正式报文中的“1”进行计数，针对AX516系统开发板(A message trap in a random stream, written by Verilog, is used to record the number of "1" in a message. When the packet capture