资源列表
BPSK
- 八相移键控调制的Verilog程序，给出了各个子模块的程序，实现了信号调制。-Eight-phase shift keying modulation of the Verilog program, each module is given the procedures, the signal modulation.
PipeLine.tar Verilog实现MIPS五段流水线
- Verilog实现MIPS五段流水线，22条指令（基本算术、移位和load、store指令），模块化设计，含注释-Verilog realization of five-stage pipeline MIPS 22 instructions (basic arithmetic, shift, and load, store instructions), modular design, with annotations
fpga-dm9000a
- 一个项目工程，硬件包含XINLINX FPGA，配置FLASH，串口，SDRAM,与以太网芯片DM9000A，实现数据采集，以太网传输，电路验证完全正确，请放心使用，SPARTAN 3E 的BGA引脚320个，不容易布板，可以参考使用的。要FPGA实现网络通信也可以参考电路，B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SD
NandFlash-FPGA-controller(ECC)
- 该压缩包包括NAND FLASH（美光）的FPGA控制器的原理及VHDL源码，非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
HDMI
- HDMI interface verilog code and specificaiton paper
fpga-jpeg-verilog
- fpga实现jpeg压缩，和视频采集程序-fpga jpeg
sgpio_target_v0_3
- sgpio target module, flexible hard drive amount.-sgpio target module, flexible hard drive amount.
sata_device_model
- sata_device_model,对做硬盘控制器的朋友有帮助-sata_device_model, to make the hard disk controller has a friend help
r80515
- r80515源代码，包含说明文档。FPGA验证通过-r80515 source code, including documentation. Verified by FPGA
USB2.0IP(RTL)
- USB2.0 IP核,ASIC,FPGA可用,Verilog HDL源代码-USB2.0 IP,Verilog HDL
Guagle_wave
- 这是一个波形文件产生软件 用于产生FPGA 所设计ROM的初始化波形文件memory initialization file-This is a waveform file generated by the design of the software used to generate FPGA initialization of ROM memory initialization file waveform file
lpc
- LPC总线从设备的verilog设计,包含状态机和中断功能。-verilog code for LPC device