资源列表
fuyongqi
- vhdl实现解复用器的功能，16位，高效移植性好-vhdl implementation demultiplexer function 16-bit, high efficiency and good graft
fsm_tb
- An odd parity checker as an FSM using VHDL
mul
- multiplier in verilog
CRC
- 一個CRC-12計算的串入式電路並下載至FPGA電路板-FPGA CRC-16
h_adder
- 一个二位全加器的VHDL实现程序，能够完美在Quartus上运行-a h_adder write in VHDL，can work well on Quartus
die
- die game implimented by haneesh indian
lfsr
- simple PRBS generator using verilog hdl
ra_str_gen1
- ripple with studture modeling vhdl file
duanx
- 实现超简洁、超清晰的 任意整数分频器功能，完全自己编制的。代码清晰了然，且占用自然少。完全适合调用。-Achieve ultra-simple, ultra-clear any integer divider function fully prepared in. Code is clearly understood, and naturally less occupied. Perfectly suited to the call.
program
- Program to access SD memory card in altera boards using altera quartus/eclips softwares.
CH375serial
- 介绍如何通过串口控制CH375,进而进行USB通信-control CH375 by serial
keypad-programming
- 假定8051单片机P1端口外接矩阵式键盘，矩阵式键盘的列线（Y0-Y3）姐单片机P1.0-P1.3，而行线（X0-X3）接P1.4-P1.7。P2.0接发光二极管。根据键值的大小使发光二极管闪烁相应的次数。- 8051 P1 port assumed external matrix keyboard, matrix keyboard column line (Y0-Y3) sister SCM P1.0-P1.3, while southbound (X0-X3) received P1.4