资源列表
wince3.00的源代码
- wince下的源代码集合打包，下载后安装。 学习wince嵌入式开发的推荐下载阅读，甚至可以找到自己想要的代码。-Jack the source code pool package, download and install it. Learning Jack embedded developers to download the recommendation read, or even want to find their own code.
STM32_F207-uC_10
- STM32 F207 under uCOS-II 2.92, including uC/TCP-IP 1.91 uCFS SD MMC driver, telnet tftp demo apps C-C-STM32 F207 under uCOS-II 2.92, including uC/TCP-IP 1.91 uCFS SD MMC driver, telnet tftp demo apps C-C++
SDLCD
- 从SD卡读出文本文件显示在LCD上(FAT32文件系统)的PROTEUS仿真.rar-From the SD card to read out a text file displayed in the LCD on the (FAT32 file system) of the PROTEUS simulation. Rar
PWM输出实验
- 基于STM32F4的一个PWM输出例程，用IO口进行复用(A PWM output routine based on STM32)
verilogHDL
- Verilog学习资料，内容详尽，是初学者的最好资料-Verilog learning materials, content, detailed information is the best for beginners
crc
- CRC用来对所输入的序列进行检测 看是不是有错误-CRC is use to detect whether the line right or wrong
VerilogHDL
- VerilogHDL教程，这要讲解该语言的基本知识并附带了许多源代码-VerilogHDL Guide, which should explain the basic knowledge of the language along with a lot of source code
Verilo
- 这是一个关于hdl的电子书，里面有比较详细的介绍，外文翻译版本-This is a hdl of e-books, which have a more detailed descr iption, foreign language translation
veriloghdl
- Verilog HDL是一种硬件描述语言，用于从算法级、门级到开关级的多种抽象设计层次的 数字系统建模。被建模的数字系统对象的复杂性可以介于简单的门和完整的电子数字系统之间。数字系统能够按层次描述，并可在相同描述中显式地进行时序建模。-Verilog HDL is a hardware descr iption language, used from the algorithm level, gate-level to switch level design of a variety of
CodTool-CrackedByApathy
- tool for hAcking on callo fu dty djdshfljdshglj kjfdhglj fdshg fgfhf -tool for hAcking on callo fu dty djdshfljdshglj kjfdhglj fdshg fgfhf
stm32-hanziPsdPfatfs
- stm32的一套系统，包含sd卡，字库，汉字显示，可以二次开发-stm32 of a system, including the sd card, character, character display, can be secondary development
SI4702-note
- silicon 公司SI47XX类型收音IC开发官方应用文档-silicon SI47XX develop aap note