资源列表
e_pro_restored
- 2011年电子设计大赛e题《简易数字信号传输分析仪》verilog源代码，分信号源和分析仪两部分-2011 electronic design competition e question the simple digital signal transfers analyzer "verilog the source code, and the points the signal source and the two parts analyzer
VPBEexample
- VPBE example FOR dm6347
MultiChan_new(HP5450A_GPIB)
- VC++基于GPIB控制惠普54504A示波器进行多通道数据采集-GPIB Control VC++ based multi-channel oscilloscope HP 54504A Data Acquisition
fp
- 通过quartus2软件使用VHDL语言将输入频率分频的程序(divide the frequency)
ev_Systemtime
- wince系统下利用EVC4.0改变系统时间
code
- 代码大全，很经典的编程书籍了，有很多原码，需要的下载啊！
divfre
- 用systemc语言设计一个分频器，并采用仿真工具仿真验证-Systemc language design with a divider
fenpin
- 用verilog语言设计了一个分频器，晶振频率为50MHz(A frequency divider is designed in Verilog language. The frequency of crystal oscillator is 50MHz)
rom_test
- rom读写实验，实现FPGA内部rom数据存取(rom read and write,this is a good document for study FPGA verilog)
sasda
- This is a new other stuff adas PMI
eetop.cn_DC综合
- DC综合教程，讲了DC综合的原理和命令，通俗易懂(DC synthesis guide,which remark the thesis and command of logic syhthesis and Design compile)
ARMtest1ForQT
- 简单且全面的QT例子，有主窗体可弹出3个不同功能的窗体，其中控制窗体已完善，可针对不同的参数输入数据并保存于目录下的TXT文件中，可供系统进行处理。-A simple but efficiency example for QT. User could reach 3 different widgets throught main widget. And they could input data in "operate_form" and save them in order to some n