资源列表
实验17 睡眠唤醒实验
- 使用正点原子探索者开发板进行的实验。按键2进行睡眠，按键0、按键1进行唤醒(Experiments using the positive atom explorer development board.Press 2 to sleep, and press 0 and 1 to wake up)
STC12C5A60S2
- STC12C5A60S2单片机各模块程序代码和技术手册，程序代码已在开发板上调试通过，希望对大家有所帮助。-STC12C5A60S2 MCU program code for each module and technical manuals, program code already in development board through debugging, we want to help.
JLINKhelp
- IAR KEIL开发环境中JLINK使用说明-IAR KEIL development environment JLINK Help
bspkit2.0
- vxworks tornado5.5 BSP GUIDE
定时器中断
- 这是基于STM32单片机建立的MDK工程，可以实现定时器中断。(This is based on the establishment of STM32 microcontroller MDK project, you can achieve timer interrupt.)
VHDL
- VHDL简明教程，对于想要学习VHDL的人是里面的资料相当不错，从初学到深入-Concise Guide to VHDL, VHDL for people who want to learn the inside information is quite good, from the beginner to the depth
c51
- 由刘文涛老师编写的51单片机代码 很多模块稍加修改就可以直接利用-Liu Wentao, prepared by the teachers a lot of 51 single-chip module slightly modified code can directly use the
CPU
- 实现简单CPU功能的源码，可以实现加减乘除和移位功能，VHDL代码，程序运行在MAX PULS和Quartua上。-The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus Ⅱ EDA tool is recommended
FATFS-V0.08A-SD-Card
- 基于STM32平台的SD卡文件系统源码。FATFS V0.08A-SD Card-Based the STM32 platform for SD card file system source. FATFS V0.08A-SD Card
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- CPU智能卡记次消费系统设计与实现-CPU time consumption of the smart card record system design and implementation
21_ds1302
- 基于verilog HDL语言的模块程序，用于驱动ds1302时钟芯片-Based on verilog HDL language module program for driving ds1302 clock chip
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- S3C2410数据手册-S3C2410 Data Sheet ...................