资源列表
SPI_FDmasterITReceWithoutDMA
- MXCube LL library, SPI Interrupt Receive MXcube LL库，SPI中断接收(MXCube LL library, SPI Interrupt Receive)
EDA
- 以上资料是是有关于FPGA芯片与硬件的链接原理图，对开发FPGA有很重要的作用。还有一些相关软件程序供参考-The above information is on the FPGA chip and the hardware link diagram, on the development of FPGA a very important role. There are a number of related software programs for reference
LCD
- 本测试程序是我买的开发板自带的，供新手练手,里面有STN液晶屏和测试资料希望对大家有用！资料很值啊-I bought this test procedure is the development of plate, novices, STN under LCD and test data for everyone to useful! Material is worth?
64-coulm-led-dot-matrix-display
- 8*64 led dot matrix display . Thank You.
BSH3vp130915ertl
- BSH3C软件可用于电子工程领域的研究人员使用，该款软件用户体验很好，方便你的电子设计，特别是画图。电路图可导出成bmp格式-The material is a software to draw the hardware circuit diagram and confirming the procedure result
ALIENTEK-MiniSTM32-classcal-example
- ALIENTEK MiniSTM32 classcal example 设计懂了STM32中跑系统，和界面设计-ALIENTEK MiniSTM32 classcal example design STM32 understand the running system, and interface design
FreeRTOSV7.1.0
- （FreeRTOSV7.1.0）FreeRTOSV7.1.0源码C，包含一些常用例程。-（FreeRTOSV7.1.0）FreeRTOSV7.1.0 source code, include some of the most common routines.
IOdemo-code
- 基于盛博综合I/O嵌入式板卡的AD\IO MFC编程。已经包含了所需的Dll和Lib 文件！-Sainsbury based integrated I/O embedded board AD \ IO MFC programming. Already contains the required and Lib Dll files!
OneNET_BC95_LWM2M_0631
- 1.该程序是基于中移物联网的M5310模组的Demo移植而来，适用于移远的BC95_B8模组,功能与原程序基本一致，具体配置方法见main.c和bc95_config.h相关注释。 2.为了方便大家使用，去掉了传感器的驱动代码，可根据自己的需要添加传感器驱动代码，将read_callback()和res_update()函数中相应位置替换为你自己的传感器值。(1. The program is based on the demo migration of m5310 module of Chin
DIANZIRILI
- EDA 用VHDL语言做的电子万年历，有全套的代码还有仿真-EDA using VHDL language to the electronic calendar, there is a full set of code there are simulation
files
- DSP芯片的描述 DPF格式 DSP芯片，也称数字信号处理器， 是一种具有特殊结构的微处理器。DSP芯片的内部采用程序和数据分开的哈佛结构，具有专门的硬件乘法器，广泛采用流水线操作，提供特殊的DSP指令，可以用来快速的实现各种数字信号处理算法。-DSP chip, also known as digital signal processor, a microprocessor with a special structure. DSP chip s internal adoption proc
ram_fifo_ram
- 程序实现了在FPGA内部开辟RAM+FIFO+RAM的IP核进行数据之间的调试。方便需要用到的童鞋进行参考。已通过modelsim调试-Implemented within the FPGA program to open up RAM+ FIFO+ RAM for data between the IP core debugging. Need to use the shoes for easy reference. Has passed debug modelsim