资源列表
danpianjikongzhidianji
- 本程序主要由键盘程序、显示器程序、步进电机驱动程序三部份组成，主程序首先初始化各变量，将显示器的高3位消隐，步进电机驱动的各引脚均输出高电平，然后调用键盘程序，并作判断，如果有键按下，则调用键盘处理程序，否则直接转下一步。下一步是将当前的转速值转换为BCD码，送入显示缓冲区；接着判断StartEnd这个位变量，是“1”还是“0”，如果是“1”，则开启定时器T1，否则关闭定时器T1-This procedure mainly by the keyboard process, monitor pro
tbooth_pipeline
- 布斯算法 2000 布斯算法 2000 布斯算法 2000 -Booth 2000 Booth algorithm algorithm algorithm 2000 Booth 2000 Booth 2000 Booth algorithm algorithm 2000
ketflink_fsm
- VERILOG的按键去抖，采用状态机的实现方法-VERILOG shaking the keys to using a state machine implementation
DSver1.1
- DS18B20ver1.1 for microhip ASM code
router_fifo
- 自己写的一个片上网络路由节点的fifo模块，工作频率达到1ghz。-Himself wrote a piece on the network routing node of the fifo module, the work frequency of 1ghz.
BootVectors
- AVRco - Pascal Example Code
AD9851-for-MSP430
- AD9851是AD公司DDS芯片，可产生方波正弦波，这个是MSP430上移植的程序-AD9851 DDS chip is AD' s, can produce a square wave sine wave, this is the MSP430 on the transplant program
24c01
- 单片机控制ATML24C系列存储IC卡源码-SCM control ATML24C series storage IC card source
max197
- 基于NIOS II的MAX197多通道AD的程序，使用C语言编写-Based on NIOS II MAX197 multi-channel AD procedures, using C language to write
Timers
- vhdl code for Timers in 8051
cpu_1
- 用verilog设计五级CPU的框架，需要自己另行补充指令，可作为学生作业和训练内容-Five CPU with verilog design framework, needs its own separate supplemental instruction can be used as student assignments and training content
edge_interfere
- 采用的主控芯片LPC1768系列CORTEX-M3内核处理器，时钟晶振XT=12MHZ，系统时钟96MHZ,本程序利用KEY1控制发光二极管的状态变化，读取按键采用边沿中断方式-Using master chip LPC1768 series CORTEX-M3 core processor, clock oscillator XT = 12MHZ, system clock 96MHZ, using this procedure KEY1 control LED behavior change