资源列表
vectors
- 实现十六进制十进制二进制和BCD之间的相互转换-Implementation hexadecimal decimal binary and BCD conversion between
floating_point_adder
- 该代码描述了一个浮点加法器的功能，浮点格式采用IEEE标准-The code describes a floating-point adder function, the use of IEEE standard floating-point format
fpu_sub
- verilog code floating point subtraction
__Lib_Q15
- Qmath functions: Functions for fixed point numbers. Aritmetic and trigonometry functions with Q15 representation of float numbers.
mult
- 用verilog HDL语言实现的16位乘法器，以及tesrbench（测试文件）。-Verilog HDL language with 16-bit multiplier, and tesrbench (test file).
Static-shows
- 用于lcd1602静态显示，可以检测其是否完好-Used to lcd1602 static display, and can detect whether intact
lajixiang
- 自动识别人体的到来，自动语音功能和自动检测垃圾箱是否满等功能-Automatically recognize the arrival of the body' s automatic voice function automatically detects the trash is full function
MusicPlay
- 用单片机模拟播放mp3音乐的小程序，可以自定义曲谱，控制蜂鸣器的频率播放出动听的声音-MCU analog playback mp3 music applet, you can customize the music scores, controlling the frequency of the buzzer play a pleasant voice
SSD_MULTIPLEXING
- four seven segment displays are in multiplexing implemented on xilinx FPGA XC3S50
agc_gen
- AGC(自动增益放大) Verilog代码 设计可以参考-AGC (automatic gain control) can refer to the Verilog code design
1
- AT89C51单片机。18B20温度显示，数码管显示温度值，并且将温度值通过串口发送到电脑上。 -AT89C51 microcontroller. 18B20 temperature display, digital display temperature, and the temperature value is sent to the computer via the serial port.
CrossClockDomain
- 跨时钟域设计不错的设计，进过modelsim仿真通过。-Cross-clock domain design is good design been to modelsim simulation through.