资源列表
RC500
- RC500通信协议-Communication protocol RC500 ..............
cosgenerator
- 这是在TI的5410DSP芯片的预选信号发生器程序，汇编语言编写的.包括.CMD文件，编译环境是CCS5
ControlCell
- verilog 实现的 jtag TAP ， 转自 opencore.com， 已通过验证
state
- 带正负的同频率周期信号的相位差测量机的FPGA实现-With positive and negative periodic signals with frequency phase measuring machine FPGA Implementation
vad
- 语音滤波短时能量 短时过滤率 端点检测 都能得到相应的仿真波形-Speech s filtering the short time percolation of a short time energy a rate to carry to order examinations can get to homologously imitate true wave a form
tristate
- VHDL code for a full adder and n bit full adder a tri state buffer and a flip flop
hi
- 简易数字钟的开发，非常适合初学单片机的朋友！-The development of simple digital clock,freshmen s zone!
button
- button for avr(compiler codevison)
spi_verilog
- spi接口设计源代码，实现了spi的接口电路，便于硬件升级-spi interface design
ad5544
- 模数乘法器AD5544的Verilog源程序，已在项目中验证了其可行。-Verilog source AD5544 analog multiplier, and have verified its feasibility in the project.
AD9850
- 运用到stm32f103的AD9850驱动程序-the driver code of AD9850 for STM32F103