资源列表
avr108
- 指南描述了如何实现小型且高速的中断驱动步进马达控制器-guide describes how to achieve the small size and high-speed interrupt-driven stepper motor controller
jhkkk
- 日历加判断第几周,请输入一个日期，我将为你判断其是一年中的第几天.
TimeProcess
- 可对时间进行加加减， UTC时间转换等等， 实用于嵌入式RTC操作-Can carry out simple calculations of time, UTC time conversion, etc., useful for embedded RTC operation
del_ctrl_rtl
- A VHDL logical example of memory delay controller -A VHDL logical example of memory delay controller
e2prom
- source code for at24c64 interfaced to 89c61x2 keil uvision to be used in conjunction with i2c source code uploaded by me
digital_clock
- 数字钟vhdl程序，能够显示年月日，时分秒，还有闰年-digital_clock.It can show the year,month,day and so on.
xr16c864
- xr16c864 source code to initialize the quad uart. source code contains quad uart initialization and communication between them
AGC
- 在实际系统中，由于发端功率和信道增益的变化会引起接收到的信号幅度的变化，这种变化是设计者所不希望的，因此，有必要对信号幅度进行自动增益控制(AGC)。另外，在解调器内部所有同步完成之后，如果解调输出为软输出，则需要对输出信号进行定标，以使较少的位数能够全面地反映解调数据的信息，这被称为定标AGC。AGC的实现原理大同小异，一般都是将信号幅度(能量)与固定门限比较，高于或低于门限的信息被送到调整环路滤波器，滤波器的输出用于控制可控增益放大器，或者是数字增益调整。-AGC
time_cnt
- very good programme for you
convol_enc
- VHDL code for convolution encoder for wimax PHY layer. This design also has control to add controlled amount of noise in encoded output.
booth_mult
- 布斯乘法器的verilog实现及仿真文件,使用modelsim仿真-booth mult s verilog and test
clk_div
- 通用异步接收/发送装置。实现微处理器与外微设备的串行通信-Universal asynchronous receiver/transmitter device. Microprocessor and external Micro Devices serial communication