资源列表
ANSYS焊接仿真
- 发布原创的ANSYS焊接耦合分析算例 高斯热源，移动用apdl实现。材料sic和al合金。材料数据应该有点商榷，所以冷却时间有点长了。
Omnivision SCCB interface verilog model
- Omnivision SCCB interface verilog model
timer
- dsplf2407定时器使用 开发环境ccs2000 运行通过 适于dsp初学者使用-dsplf2407 timer use
Blk
- 是VXWORKS 块设备驱动模板，请新建加载型工程再添加-Is a block device driver VXWORKS template, add new load-based engineering
verilog
- 数字锁相环电路verilog源代码 开发环境quartus-Digital PLL circuit verilog source code
fsm_moore_2_always
- 使用2個always去描述有限状态机的3個block，state register與next state logic合一 -state register and next state logic
paobiao
- 数字跑表，包含百分秒、秒、分，能在FPGA上下载并显示-Digital stopwatch, including hundredths of a second, seconds, minutes, can be downloaded and displayed on the FPGA
syn_FIFO
- 同步FIFO，主要用于数据缓存，给异步FIFO打下基础，是个不错学习例子，在ncverilog中仿真通过-Synchronous FIFO, mainly used for the data cache, and lay the foundation to the asynchronous FIFO, is a good example of learning through simulation in ncverilog
jiaotongdeng
- 理想状态的四路交通灯设计，用CPLD/FPGA驱动的，时间可以更改。-Ideal state of four traffic lights design, CPLD/FPGA-driven, time can be changed.
13
- FPGA工程师成长手册源码，可以帮初学者很好的学习掌握FPGA的开发应用。-FPGA S
Servo_motor
- MCU with servo motor ... that is servo test code here attached-MCU with servo motor ... that is servo test code here attached...
fanMode
- 风扇的自然风输出 单片机-fan sleep mode