资源列表
Freescale-CCD
- 菲斯卡尔智能车使用的CCD摄像头程序，用以对黑色道路的识别-Freescale smart car CCD camera used in the procedure for the identification of the black road
lcd
- Code in C++ for show information in displays LCD.
VHDLnf
- VHDL实现任意整数分频，--只要把n设置成你要分频的数值就可以了-VHDL arbitrary integer frequency, -- n as long as you want to set the frequency of the numerical breakdown on the
div3
- 用VHDL硬件描述语言实现的良好运行的三分频电路
second
- 一个简单的用vhdl写的计秒功能的小程序.
div
- 二进制除法器，采用移位相减的方法实现，位数可调-The source code of a divider
Hardware_Delay_50ms_8051
- A complete example using a hardware-based delay using the 8051.
UART
- UART发送数据 中断接受数据 UART发送数据 中断接受数据-UART interrupt receive UART transmit data
booth.vhd
- this the source code for booth s multiplier. used to low power dsp architecture.-this is the source code for booth s multiplier. used to low power dsp architecture.
fsm
- 三段式状态机的典型写法，verilog实现-The three section type of typical state machine method, Verilog implementation
ASCII_PACKAGE
- ASCI package in VHDL for verilog implementation
uarttx
- fpga板 verilog写的串口发送数据的模块，主要可以看下思路，也是可用的-Fpga board verilog write serial port to send data module, the main can look at ideas, is also available