资源列表
fpdiv_vhdl
- 四位除法器的VHDL源程序-four division of VHDL source
ack
- fsk调制解调算法,这个对于现在的dsp非常重要
FINAL_OUT.VHD
- this is a vhdl program to test your LCD
TestFre
- 通过时钟分频，用PWM脉冲调宽来控制LED灯亮度的强弱，改变PWM的占空比来实现恒流LED的亮度强弱控制-By the clock frequency, pulse width modulated using PWM to control LED brightness light intensity, changes in PWM duty cycle to achieve constant current LED brightness intensity control
d_flip_175
- 4 D-FlipFlop source code with VHDL
int_div
- 这是流水灯的分频程序，可能不是很完善，欢迎大家下载。-This is the light frequency water program, may not be perfect, welcome to download.
tdc
- time to digital convertor
VHDL-example_counter
- M=11的计数器；计数是一种最简单基本的运算，计数器就是实现这种运算的逻辑电路，计数器在数字系统中主要是对脉冲的个数进行计数，以实现测量、计数和控制的功能，同时兼有分频功能-M = 11 counter The count is one of the most simple basic computing, counter to realize the operation is logic circuit
4addr
- 用verilog 语言编写的4位全加器，还是入门基础必备.-Verilog language with 4bit full adder, or basic essential.also it s so important to learn verilog!
ov7670_controller
- ov7670的控制器代码，VHDL，稍加修改即可完成ov系列的摄像头的控制-control ov7670 controller code, VHDL, slightly modified to complete ov series cameras
BC-ADDRESS
- B61580 1553B BC模式配置地址-B61580 1553B BC
ledbuff
- fpga单片机通过数码管实现1S自加功能，时间通过计数器实现-The fpga single chip machine implements the 1S self-addition function through the digital tube, and the time is achieved through the counter