资源列表
signal-generator
- FPGA 信号发生器的程序，在实验板上调试成功
shift_register
- -- DEscr iptION : Shift register -- Type : univ -- Width : 4 -- Shift direction: right/left (right active high) -- -- CLK active : high -- CLR active : high -- CLR type : synchronous -- SET active : high -- SET type : synchronous
trafficlight
- design and simulate the traffic light controller-design and simulate the traffic light controller
RGB_YCrCb_Multiplierless_Color_Converter
- verilog source code for RGB YCrCb color converter
max7000vgasync
- VHDL animation with simple codes
ad0809verilog
- 这是用Verilog编写的ad0809，和之前的vhdl功能相似，不过开发环境部一样-It is written in Verilog ad0809, and before the vhdl function similar, but the Ministry of Environment as the development
ram_dp_sr_sw[1]
- dual port ram control-dual port ram control dual port ram control dual port ram control
sram_duxie
- 用FPGA控制的SRAM读写程序，要写的数据是由FPGA内部寄存器产生-Control with FPGA SRAM read and write procedures
BEEP
- 以STC89C52单片机为核心控制的，通过5V无源蜂鸣器，分别播放各个音阶，可以用来了解各个音节的频率-In STC89C52 microcontroller as the core control through passive buzzer 5V were playing each scale can be used to understand each syllable frequency
my_mm1.nd
- OPNET网络仿真 对队列栈仿真和分析 MM1-OPNET MM1
4key
- C语言编写的4*4矩阵键盘程序，开发环境为PIC16F877A，测试正常。-C language 4* 4 matrix keyboard program development environment for PIC16F877A, the tests are normal.
timer
- 为学习单片机的初学者提供定时器代码，希望能对这些人有所帮助-To learn microcontroller for beginners to provide the timer code, hoping to help these people