资源列表
5509AUSB
- 5509A DSP USB 开发框架程序-5509A DSP framework for the development of procedures for USB
lxh_xulijianceqi
- 这是1个序列检测器,可以重复检测序列,在通信方面用的较多-This is a sequence detector, can detect repeat sequence, in communications with the more
immediate_divide_module
- 用组合逻辑实现循环除法器。稳定、安全、可靠。-Combinational logic loop divider. Stable, secure, and reliable.
eightpricess1
- 八皇后，实现相应的功能，方便简单，易行。可多处实现-eightpricess
test-bech-of-adder8
- this is a testbench of 8 bit adder
4-multiplier-_vhdl
- 4 bit multiplier which can be use for making projects......can also be stimulated on spartan kits
DDC_VHDL
- 基于FPGAD的VHDL实现的DDC代码-VHDL code implementation of the DDC
Cordic
- Cordic algorithm in VHDL
bujindianjiyuanli
- 利用按键控制步进电机正转，反转，加速，减速。驱动方式采用一相励磁。-Controlled stepper motor with the key forward, reverse, speed up, slow down. The drive mode using the one-phase excitation.
touch
- touch.c 该文件是触摸屏芯片AD7843的驱动代码，其中包括了main主函数以及获取x、y坐标的子函数-touch.c AD7843
lvboqixishu
- 1、设计一个62阶低通滤波器，采样频率为9kHz，通带截止频率为3kHz，要求阻带最小衰减50dB。 2、将滤波器系数输出到txt文本文档。 -1, the design of a 62-order low-pass filter, the sampling frequency is 9kHz, passband cutoff frequency of 3kHz, requires a minimum stopband attenuation 50dB. 2, the output
7-BCD
- 7段数码管控制接口程序和对初始频率为50MHZ的时钟的分频程序-7-segment control interface program and the initial frequency of 50MHZ clock divider program