资源列表
RS232.VHDL
- RS232 Communication function in VHDL for Spartan 3E
阻塞模式主要用于无窗口、多线程处理中
- 阻塞模式主要用于无窗口、多线程处理中。启动服务之后应该启动一个线程来轮询DTU数据，收到数据后直接处理，或放数据缓存，再由其他线程来处理。-Blocking mode is mainly used for non-window, multi-threaded processing. After the start the service should start a thread to poll the DTU data, received data directly, or put the d
psubadd8
- 4位减法器，可以完成4位数的减法功能，也可以完成更高一层的8位减法器。-4 subtractor, can complete a four-digit subtraction, you can complete a higher level of 8-bit subtractor.
ppm
- 实现PPM编码，经测试，准确可用。现在正在调解码器。不久也可以上传。-Implement PPM encoding, tested and accurate available. Now mediate codec. Can also be uploaded soon.
MUXER
- SHOWS THE SIMPLEST WAY TO CREATE A SIMPLE MUX IN VHDL-SHOWS THE SIMPLEST WAY TO CREATE A SIMPLE MUX IN VHDL...
word
- 英文显示电路显示0到f 的十六进制计数器-English display circuit
vga.v
- 基于altera公司的maxii epm240t100c5系列的 实现了 vgA接口控制-Based on the the altera Company' s maxii epm240t100c5 series realized vgA interface control
jiance1
- 3异或条件输出 周期的伪随机数生成器伪随机数 -The XOR output cycle pseudo-random number generator
addercs16.v
- 这是自己写的 16 bits carry select adder 的verilog的代码，如果有用fell free to download-It is 16 bits verilog write their own code to carry select adder, if a useful fell free to download
CCD_Sim
- 用verilog HDL语言编写的面阵CCD相机输出图像程序。-The CCD camera output image process using Verilog HDL language.
51
- 通过调节滑动电阻的阻值，调节PWM波的占空比调节电机的转速-BLDC speed changable
TOP
- IFFT快速傅里叶逆变换的FPGA实现,IFFT的实现-IFFT fast Fourier inverse transformation of the FPGA implementation