资源列表
Freq_Divider
- frequency divider fpga get slow frequency
sn7448
- verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."
fifo.v
- This the source code for FIFO -This is the source code for FIFO
subtractor
- Verilog source code for full subtractor module build with predefined nor gates.
scankey
- 这是P1口键盘 P3口数码管位选 P1口数码管段选的Proteus仿真电路的C语言源程序 可以用KEIL编译 是本人自己摸索出来的 希望对大家有用-This is the keyboard port P1 P3 digital port P1 port Choice of digital pipe selected Proteus simulation circuit of the C language source code can be used KEIL compiler is my ow
install-vxworks62-xscale
- install txt for vxworks 6.2 intel-xscale license文件-install txt for vxworks 6.2 intel-xscale license
ADC0808
- AD0808的压力控制系统源代码，主要是用于八路压力数据采集，然后单片机控制。通过数码管显示，第一位表示采集通道，后三位是压力值-AD0808 pressure control system source code, mainly for eight way pressure data acquisition, and then the MCU control. Through the digital tube display, first said acquisition channels,
LED
- 从红外接收头接收到信息反映到LED上,在LED上看到接受信息-From the infrared receiver received the information reflected on the LED, to see receive information on the LED
divider
- Verilog语言编写分频器，用于数字竞赛式抢答器的设计模块之一-The Verilog language divider for digital contest Responder design module one
vbSANLINGPLC
- vb与三菱PLC通信,这个也是很不错的东西，推荐一下-vb with Mitsubishi PLC communication, this is also a very good thing, recommend
ssd1306
- solomon ssd1306 驱动源代码-solomon ssd1306
8051-bt
- 8051接收藍牙與接收的初始設定 1/12T的8051改24MHz,要改TH1-8051 receiving Bluetooth