资源列表
CommandResponse
- verilog语言写的sdram控制器—命令响应模块代码，经过测试，逻辑正确，可编译，可综合-verilog language written sdram controller-order response to the code, tested, logically correct, compiler, integrated
f020_uarts
- Cygnal C8051F020 Dual UART Example
fet140_tb_09
- MSP-FET430P140 Demo - Timer_B, PWM TB1-2, Up/Down Mode, DCO SMCLK-MSP-FET430P140 Demo-Timer_B, PWM TB1-2. Up / Down Mode, the making of SMCLK
fet140_spi1_04
- MSP-FET430P140 Demo - USART1, SPI Full-Duplex 3-Wire Master P1.x Exchange-MSP-FET430P140 Demo-USART1. SPI Full-Duplex 3-Wire Master P1.x Exchange
TMS320C28xDSP
- TMS320C28xDSP创建C可调用的汇编程序的简便方法-TMS320C28xDSP C can be called to create a compilation procedures simple method
fet140_i2c_17
- MSP-FET430P140 Demo - I2C, Slave Reads/Writes with Master, Rptd Start-MSP-FET430P140 Demo-I2C, Slave Reads / Writes with Master, Rptd Start
fet140_flashwrite_01
- MSP-FET430P140 Demo - Flash In-System Programming, Copy SegA to SegB-MSP-FET430P140 Demo-Flash In-System Pro gramming, Copy SegA to SegB
motorola_dsp
- MOTOROLA的dsp－56F807对atmel的eepromI2C总线的读写操作-the dsp - 56F807 right atmel the total eepromI2C Read and Write Line
fet140_dma_07
- MSP-FET430P140 Demo - DMA0/1, Rpt d Blk to DAC0/1, Sin/Cos, TACCR1, XT2-MSP-FET430P140 Demo-DMA0 / a, Rpt d Blk to DAC0 / 1, Sin / Cos, TACCR1, XT2
fet140_clks
- MSP-FET430P140 Demo - Basic Clock, Output Buffered SMCLK, ACLK and MCLK
fet140_adc12_11
- MSP-FET430P140 Demo - ADC12, Single Channel Rpt Mode, TA1 as Sample Trigger-MSP-FET430P140 Demo-ADC12. Rpt Single Channel Mode, TA1 as Sample Trigger
std_cf_2s60_ES
- Altera公司开发板2s60 CF卡通用例程（初始化、读、写、测试等）-Altera Corporation development board 2s60 CF cartoon with routines (initialization, reading, writing, testing, etc.)