资源列表
FPGA_LMS
- VHDL写的LMS算法程序。利用本地正弦信号，根据LMS算法对输入信号进行跟踪。用以产生和输入信号同频同相的本地信号。-VHDL LMS algorithm written procedures. The use of local sinusoidal signal, according to the LMS algorithm for tracking the input signal. Used to produce and the input signal with frequency p
vhdll
- 输入为8421BCD码，输出为8421BCD码。 程序中自动对输入进行转换，将8421BCD转换成余3码，然后采用修正函数实现加法，并且利用程序将加法结果转换成8421BCD码进行输出，且输出转换前后的中间结果。 -8421BCD code input and output for 8421BCD yards. Procedures for automatic input conversion, will be converted into 8421BCD I 3 yards, and
real_clock
- C8051F020对实时时钟的读写，用I2C进行读写-C8051F020 real-time clock to read and write, and write with I2C
HZ.ZIP
- 汉字点阵滚动指示牌源程序.txt 汉字点阵滚动指示牌源程序.txt-Chinese lattice rolling signs source. Txt Chinese lattice rolling signs source. Txt
s3c44b0_source_code
- 远峰公司提供的S3C44B0的开发程序,包括电路原理图及一个例程。-Yuan-feng S3C44B0 provided by the development process, including circuit schematics and a routine.
C51_I2C
- 小容量单片机系统的C语言程序结构,极其好用-small capacity SCM System C language program structure, very handy
VC[1].m
- VC调用matlab中定义的[1].m函数实例 VC调用matlab中定义的[1].m函数实例-VC defined in [1]. M function examples VC called defined Matlab [1]. m function examples VC call Matlab defined in [1]. m function examples
fdpll
- 简单的可配置dpll的VHDL代码。 用于时钟恢复后的相位抖动的滤波有很好的效果， 而且可以参数化配置pll的级数。-simple configurable dpll VHDL code. Clock Recovery for the jitter filtering is a very good result, but can pll configuration parameters of the series.
detector
- 本程序实现8位序列检测的功能-the program eight Sequence Detection functions.
this
- ad0804的说明文件，可用keilc模应通讯-ad0804 note, the model can be used in communications keilc
HardDriver
- 这是一个关于modem 的事例,希望对初学者能有点帮助-This a case of the modem, and I hope to help beginners can be a bit! !
dp51
- 这些是基于dp51仿真仪的程序，须配合仿真仪一起使用，或者可以做一些修改-these dp51 simulation is based on the instrument procedures must be compatible with simulator used together, or can do some changes