资源列表
PCI_PIO
- 不足20元的PCI设计，含ABEL源代码。-PCI design less than 20Yuan ,including ABEL code
cp_src_v08
- Controller Area Network Programming Interface Environment Ver0.8。 CanPie版本0.8. CAN总线通讯编程接口源代码。-Controller Area Network Programming Interface Environment Ver0.8. CanPie version 0.8. CAN bus communication interface programming source code.
硬件字库
- 介绍如何在单片机系统上制作硬件字库，可以帮助您更快的了解和开发自己的硬件字库-how the SCM system produced hardware font, can help you more quickly understand and develop their own hardware Font
M190打印程序
- 本程序为M190微型打印机的程序,采用C语言和汇编混合编写,已经经过调试并在应用中-procedures for the M190 Micro Printer procedures, and use of C language compilation mixed preparation, and after debugging applications
税控机程序
- 本程序为某企业的税控机固件程序.基于东芝TMP93CS41 16位单片机编写,符合国家标准.该程序已经经过多次长期调试.-the procedures for a business tax control machines firmware procedures. Based on Toshiba TMP93CS41 16 MCU development, in line with the national standard. The program has after many long de
监护仪程序
- 该程序是基于PC104的工控板的多参数监护仪的源程序.监护内容包含:心电\\血氧\\呼吸\\无创血压等等.-the program is based on the PC104 IPC board multi-parameter monitor of the source. Guardianship contains : ECG \\ oxygen \\ respiratory \\ noninvasive blood pressure and so on.
AD中断采样
- AD中断服务程序,介绍了中断的利用和编程技巧-AD interrupted service procedures, introduced a suspension of the use and programming skills
bin2gry
- verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
bidir
- verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
backward
- verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
arbit
- verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
and_or
- veilog 代码 用户可以直接调用，作为底层模块。同时已经编译成功，可以作为基本单元库。-veilog code user can derict use it for the base mode.