资源列表
pwm_higt
- modelsim设计的可调占空比的方波程式-modelsim designed adjustable duty cycle of the square wave program
sanfenpin
- 这是我自己编写的三分频，也就是奇数分频，占空比为1：1，当然如果需要其它奇数分频，只要将程序里面的N和counter修改即可-This was my third prepared by the frequency, which is odd hours, frequency and duty ratio of 1:1. Of course, if the needs of other odd hours, frequency, as long as the proceedings inside
light_telegraphic_code_four_frequency
- 实光电码盘的输出数据的四倍频，使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.
matrix3x3
- 3X3矩阵乘法的VHDL程序实现！对初学者有很大的帮助！-3X3 matrix multiplication VHDL program! For beginners is a great help!
8-CPU
- 简单的8位CPU，内含PDF文件.可自己查看详细说明-simple eight CPU, containing PDF files. They can check details
counterdisplay
- VHDL编写的计数和显示程序，对于学习VHDL语言的朋友有一定帮助！-VHDL prepared by the count and display program for learning VHDL friends will definitely help!
8051inVHDL
- 8051的VHDL IP核，很不错的东西-8051 VHDL IP core, a very good thing
CpldandEepromI2c
- verilog 编写的I2c协议程序，用于cpld读写EEPROM-verilog I2c agreement prepared by the procedures for cpld writable EEPROM
shuzizhong05
- MAX+plus II 9.23 Baseline-MAX plus Baseline II 9.23
TLC5510APhase
- 运用TLC5510A高速(20M),扫描出波形,测量相位差,两个TLC5510A测两个波形. -TLC5510A use of high-speed (20M), scanning waveform, phase difference measurement, Measuring 2 2 TLC5510A waveform.
Digital_Clock_VHDL_s0g0
- Digital Clock in Assembly 我的一个大学满分VHDL作品，数字石英钟的模拟程序。-Digital Clock in the Assembly a perfect score University VHDL works , the number of quartz crystal clock the simulation program.
SimpleRAMModel
- 一个SIMPLE RAM ACCESS的VHDL很经典的例子，我老师的作品。-a SIMPLE RAM ACCESS VHDL classic example of my teacher's work.