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文件名称:HW3_P1

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
  • 上传时间：
    2012-11-16
  • 文件大小：
    175.79kb
  • 已下载：
    0次
  • 提 供 者：
    ch***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

Clock Controller

There are often situations where one wishes to pass a predetermined number of clock pulses and then stop. The purpose of this problem is to design a controller in VHDL to gate a preset number of pulses form a free-running clock “CLK”. Your design should pass a predetermined number of pulses to an output “POUT” and then stop, without producing any shortened pulses or glitches. Your circuit should have an 8 position DIP Switch for setting a number “N” and a free running clock input that has a frequency is of 2.55 Mhz . The “START” signal is an asynchronous input signal which will initiate the generator such that when the start button is pushed exactly N clock pulses would be passed to the output “POUT”. -Clock Controller

There are often situations where one wishes to pass a predetermined number of clock pulses and then stop. The purpose of this problem is to design a controller in VHDL to gate a preset number of pulses form a free-running clock “CLK”. Your design should pass a predetermined number of pulses to an output “POUT” and then stop, without producing any shortened pulses or glitches.　Your circuit should have an 8 position DIP Switch for setting a number “N” and a free running clock input that has a frequency is of 2.55 Mhz . The “START” signal is an asynchronous input signal which will initiate the generator such that when the start button is pushed exactly N clock pulses would be passed to the output “POUT”.
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下载文件列表

HW3_P1/_xmsgs/
HW3_P1/_xmsgs/xst.xmsgs
HW3_P1/clk_divider.vhd
HW3_P1/HW3_P1.ise
HW3_P1/HW3_P1.ntrc_log
HW3_P1/HW3_P1.restore
HW3_P1/HW3_P1_xdb/
HW3_P1/HW3_P1_xdb/tmp/
HW3_P1/HW3_P1_xdb/tmp/ise.lock
HW3_P1/HW3_P1_xdb/tmp/ise/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/_ProjRepoInternal_/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/Autonym/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/common/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/__stored_object_table__
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject_StrTbl
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl_StrTbl
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_object_table__
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_objects__
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/__stored_objects___StrTbl
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main_StrTbl
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData_StrTbl
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/SrcCtrl/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/SrcCtrl/SavedOptions/
HW3_P1/HW3_P1_xdb/tmp/ise/__OBJSTORE__/STE/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/_ProjRepoInternal_/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/_ProjRepoInternal_/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/Autonym/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/Autonym/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/bitgen/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/bitgen/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/common/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/common/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/cpldfit/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/cpldfit/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/dumpngdio/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/dumpngdio/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/fuse/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/fuse/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/HDProject/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/HDProject/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/hprep6/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/hprep6/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/idem/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/idem/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/map/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/map/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/netgen/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/netgen/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ngc2edif/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ngc2edif/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ngcbuild/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ngcbuild/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ngdbuild/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ngdbuild/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/par/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/par/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectNavigator/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectNavigator/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectNavigatorGui/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectNavigatorGui/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/ProcessProperties/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/ProcessProperties/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/ProjectProperties/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/ProjectProperties/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/UserLibraries/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/UserLibraries/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/UserPartitions/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/UserPartitions/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/UserSourceFiles/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/ProjectSeedData/UserSourceFiles/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/runner/
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/runner/regkeys
HW3_P1/HW3_P1_xdb/tmp/ise/__REGISTRY__/SrcCtrl/
HW3_P1/HW3_P1_xdb/tmp/ise/__

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