On-chip synchronization is achieved by connecting the CLKFB input to a point on the

global clock network driven by a BUFG, a global clock buffer. The BUFG connected to

the CLKFB input of the DCM must be sourced from either the CLK0 or CLK2X

outputs of the same DCM. The CLKIN input should be connected to the output of an

IBUFG, with the IBUFG input connected to a pad driven by the system clock.