资源列表
clk_gen
- this is a clock generator program by using concurrent language verilog hdl with xilinx ise.
06725688
- this will helpful for your reference studies
BP_DSM_talk
- bipolar digital sigma modulation program and materials in vlsi
sinwave-genertor
- sinwavw generator code in verilog this will helpful for generating a sinave without using a cordic
cifafenxi
- 《编译原理》的课程程序，一个用c语言编写的词法分析器程序。-The compilation principle course program, a lexical analyzer program written in c language.
lab1-GPIO_LED
- D S P 28335 G P I O设定为LED, 包括了定时器的配置,和中断的设置-DEP28335 is set as to light up the LED.
lab3-TIMER0
- dsp28335 的定时器应用, 用最简单明了的方式设置定时时间,-dsp28335 timer application, set the timing in the most straightforward way,
fwlab
- 3 simple programs to make the working of a factorial, a fibonnaci series and a palindrome func
Lexical-Analyzer
- Lexical Analyzer for compiler
lex_analyzer_implement
- Lexical analyzer for compiler in java
symbol_table_code_impl
- Symbol table for compiler
a_mus_player_java
- A simple java music player