资源列表
clk_gen
- this is a clock generator program by using concurrent language verilog hdl with xilinx ise.
bin_count
- i m sending hdl code of dm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.-i m sending hdl code of ofdm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.
math_exp
- 数学表达式解析程序C++源码 支持 + - * / ^ （） 等主要运算符 采样递归算法, 供学习参考，自由版权 samuel_ni@yahoo.com -math expression parser C++ source code support+- ^ （） operators use of recursive algorithm，copyright free
compil_projet1
- 该程序是基于脚本ocaml语言的简易版c语言编译器。-a compiler c bansed on ocaml
XJad
- 反编译程序 直接文件打开然后点击反编译就可以看到-openfile then you can see that you can not see before
KEYBCF
- MICROSOFT FOCUS COBOL VERSION 3.0 COMPLIER
Info-ZIP_zzfind
- MICROSOFT FOCUS COBOL VERSION 3.0 COMPLIER
EX
- MICROSOFT FOCUS COBOL VERSION 3.0 COMPLIER
COBOL
- MICROSOFT FOCUS COBOL VERSION 3.0 COMPLIER
ADIS
- MICROSOFT FOCUS COBOL VERSION 3.0 COMPILER
ExternalInterrupt
- Internal Interrupt library for msp430 series
ENC28J60_Sample_Code
- ENC28j60 with PIC.there is an very nice code in that.you can use it very simple.It s very very best for you.all data that you need.