资源列表
selected
- Example_Reduce编程模型实现海量数据处理—数字求和-Hadoop学习-Example_Reduce programming model to achieve massive data processing- Digital Sum-Hadoop learning
Lab-2-NIOS_demo
- 关于Nios的开发例程。（偶是新人 向大家多多学习！）-This is the demo about Nios II
PSOt
- PSO工具箱.zip PSO工具箱.zip-PSO toolbox. ZipPSO toolbox. ZipPSO toolbox. Zip
dot_product
- 利用C++进行MPI并行程序的编程，实现点积计算 例如： 输入； X = 1 2 3 输入： Y = 3 4 6 输出： The dot product is 29.-Use MPI to have a dotproduct
qq
- 数码显示
voltage
- 电压采集 电压采集 电压采集 电压采集-data acq english your can write and data acq english your can write and data acq english your can write and data acq english your can write and
MapCG
- mapreduce跟gpu的结合，可在cpu，也可在gpu上运行-combined with the gpu mapreduce can be cpu, gpu can also be run on
G120_CU24x-2_DP_F_V4_4
- SINAMICS G120 CU120x-2DP FILES
dsss_chaotic
- 1. BPSK modulation of data which ever you input (default data is “MANIPAL REDDY”). 2. MANIPAL REDDY is changed into ASCII Format and into two-bit format for BPSK Modulation. 3. Chaos is used for spreading the binary bit sequence. 4. Uniform
parallel-computing
- 并行计算导论，作为基础入门的指导书 张林波出版-Introduction to parallel computing, as a basis for entry guide book
pre-distortion
- 针对功放得到非线性失真，采用查表法预失真对功放的非线性进行补偿，仿真表明了补偿方式的有效性。-Obtained for nonlinear distortion amplifier, using the look-up table predistortion to compensate for non-linear power amplifier, simulation shows the effectiveness of compensation.
alu16
- 16位运算器，用实例化模块链接，是采用Verilog hdl编程，是实现fpga的代码-16-bit arithmetic unit, with links to instantiate module is using Verilog hdl programming, is to achieve the fpga code