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文件名称:Chapter-6

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    473.72kb
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    0次
  • 提 供 者：
    张****
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用Verilog编写的SPI协议包括了最基本的协议和功能，并通过测试。本SPI是主。-SPI using Verilog written agreement includes the most basic protocols and functions, and passing a test. The SPI is the main.
相关搜索： Verilog SPI

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下载文件列表

Chapter-6/spi_controller/bench.vcd
Chapter-6/spi_controller/chart/Thumbs.db
Chapter-6/spi_controller/chart/图6-11.bmp
Chapter-6/spi_controller/chart/图6-12.bmp
Chapter-6/spi_controller/chart/图6-13.bmp
Chapter-6/spi_controller/chart/图6-14.bmp
Chapter-6/spi_controller/chart/图6-17.bmp
Chapter-6/spi_controller/chart/图6-18.bmp
Chapter-6/spi_controller/chart/图6-19.bmp
Chapter-6/spi_controller/chart/图6-7.bmp
Chapter-6/spi_controller/spi_clgen.v
Chapter-6/spi_controller/spi_controller.cr.mti
Chapter-6/spi_controller/spi_controller.mpf
Chapter-6/spi_controller/spi_defines.v
Chapter-6/spi_controller/spi_shift.v
Chapter-6/spi_controller/spi_slave_model.v
Chapter-6/spi_controller/spi_top.v
Chapter-6/spi_controller/tb_spi_top.v
Chapter-6/spi_controller/timescale.v
Chapter-6/spi_controller/transcript
Chapter-6/spi_controller/vsim.wlf
Chapter-6/spi_controller/wave/spi_clgen.bmp
Chapter-6/spi_controller/wave/spi_shift.bmp
Chapter-6/spi_controller/wave/spi_slave_model.bmp
Chapter-6/spi_controller/wave/spi_top.bmp
Chapter-6/spi_controller/wave/tb_spi_top.bmp
Chapter-6/spi_controller/wave/Thumbs.db
Chapter-6/spi_controller/wave/wb_master_model.bmp
Chapter-6/spi_controller/wb_master_model.v
Chapter-6/spi_controller/work/spi_clgen/verilog.asm
Chapter-6/spi_controller/work/spi_clgen/_primary.dat
Chapter-6/spi_controller/work/spi_clgen/_primary.vhd
Chapter-6/spi_controller/work/spi_shift/verilog.asm
Chapter-6/spi_controller/work/spi_shift/_primary.dat
Chapter-6/spi_controller/work/spi_shift/_primary.vhd
Chapter-6/spi_controller/work/spi_slave_model/verilog.asm
Chapter-6/spi_controller/work/spi_slave_model/_primary.dat
Chapter-6/spi_controller/work/spi_slave_model/_primary.vhd
Chapter-6/spi_controller/work/spi_top/verilog.asm
Chapter-6/spi_controller/work/spi_top/_primary.dat
Chapter-6/spi_controller/work/spi_top/_primary.vhd
Chapter-6/spi_controller/work/tb_spi_top/verilog.asm
Chapter-6/spi_controller/work/tb_spi_top/_primary.dat
Chapter-6/spi_controller/work/tb_spi_top/_primary.vhd
Chapter-6/spi_controller/work/wb_master_model/verilog.asm
Chapter-6/spi_controller/work/wb_master_model/_primary.dat
Chapter-6/spi_controller/work/wb_master_model/_primary.vhd
Chapter-6/spi_controller/work/_info
Chapter-6/spi_controller/work/spi_clgen
Chapter-6/spi_controller/work/spi_shift
Chapter-6/spi_controller/work/spi_slave_model
Chapter-6/spi_controller/work/spi_top
Chapter-6/spi_controller/work/tb_spi_top
Chapter-6/spi_controller/work/wb_master_model
Chapter-6/spi_controller/chart
Chapter-6/spi_controller/wave
Chapter-6/spi_controller/work
Chapter-6/spi_controller
Chapter-6

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