文件名称:spi_latest.tar
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spi总线控制器的程序，实现了同步串行接口的输出-On the spi serial bus interface programming, synchronous transfer
相关搜索： spi
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下载文件列表
./trunk/
./trunk/bench/
./trunk/bench/verilog/
./trunk/bench/verilog/wb_master_model.v
./trunk/bench/verilog/tb_spi_top.v
./trunk/bench/verilog/spi_slave_model.v
./trunk/rtl/
./trunk/rtl/verilog/
./trunk/rtl/verilog/timescale.v
./trunk/rtl/verilog/spi_top.v
./trunk/rtl/verilog/spi_defines.v
./trunk/rtl/verilog/spi_clgen.v
./trunk/rtl/verilog/spi_shift.v
./trunk/sim/
./trunk/sim/rtl_sim/
./trunk/sim/rtl_sim/run/
./trunk/sim/rtl_sim/run/rtl.fl
./trunk/sim/rtl_sim/run/run_sim
./trunk/sim/rtl_sim/run/sim.fl
./trunk/doc/
./trunk/doc/spi.pdf
./trunk/doc/src/
./trunk/doc/src/spi.doc
./trunk/bench/
./trunk/bench/verilog/
./trunk/bench/verilog/wb_master_model.v
./trunk/bench/verilog/tb_spi_top.v
./trunk/bench/verilog/spi_slave_model.v
./trunk/rtl/
./trunk/rtl/verilog/
./trunk/rtl/verilog/timescale.v
./trunk/rtl/verilog/spi_top.v
./trunk/rtl/verilog/spi_defines.v
./trunk/rtl/verilog/spi_clgen.v
./trunk/rtl/verilog/spi_shift.v
./trunk/sim/
./trunk/sim/rtl_sim/
./trunk/sim/rtl_sim/run/
./trunk/sim/rtl_sim/run/rtl.fl
./trunk/sim/rtl_sim/run/run_sim
./trunk/sim/rtl_sim/run/sim.fl
./trunk/doc/
./trunk/doc/spi.pdf
./trunk/doc/src/
./trunk/doc/src/spi.doc
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