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文件名称:ata_latest.tar

  • 所属分类：
    Other systems
  • 标签属性：
    [PDF]
  • 上传时间：
    2012-11-16
  • 文件大小：
    907.06kb
  • 已下载：
    0次
  • 提 供 者：
    G*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

The OCIDEC (OpenCores IDE Controller) is a WISHBONE rev.B2 compliant

ATA/ATAPI-5 host implementation. The ATA (AT Attachment) interface, also

known as IDE (Integrated Drive Electronics) interface, provides a simple interface to

low cost non-volatile memories like hard-disk drives, DVD players, CDROM

players/writers, CompactFlash and PC-Card devices.
相关搜索： ATAPI CDROM dvd atapi wishbone ATA IDE controller

(系统自动生成,下载前可以参看下载内容)

下载文件列表

./
./ata/
./ata/tags/
./ata/branches/
./ata/web_uploads/
./ata/web_uploads/index.shtml
./ata/web_uploads/preliminary_ata_core.pdf
./ata/trunk/
./ata/trunk/bench/
./ata/trunk/bench/verilog/
./ata/trunk/bench/verilog/wb_mast_model.v
./ata/trunk/bench/verilog/wb_model_defines.v
./ata/trunk/bench/verilog/wb_slv_model.v
./ata/trunk/bench/verilog/test_bench_top.v
./ata/trunk/bench/verilog/tests.v
./ata/trunk/bench/verilog/ata_device.v
./ata/trunk/doc/
./ata/trunk/doc/src/
./ata/trunk/doc/src/ata_core.doc
./ata/trunk/doc/preliminary_ata_core.pdf
./ata/trunk/rtl/
./ata/trunk/rtl/verilog/
./ata/trunk/rtl/verilog/ocidec-1/
./ata/trunk/rtl/verilog/ocidec-1/atahost_pio_tctrl.v
./ata/trunk/rtl/verilog/ocidec-1/atahost_controller.v
./ata/trunk/rtl/verilog/ocidec-1/atahost_top.v
./ata/trunk/rtl/verilog/ocidec-1/ro_cnt.v
./ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
./ata/trunk/rtl/verilog/ocidec-1/timescale.v
./ata/trunk/rtl/verilog/ocidec-1/ud_cnt.v
./ata/trunk/rtl/verilog/ocidec-1/atahost_wb_slave.v
./ata/trunk/rtl/verilog/ocidec-2/
./ata/trunk/rtl/verilog/ocidec-2/atahost_pio_tctrl.v
./ata/trunk/rtl/verilog/ocidec-2/atahost_controller.v
./ata/trunk/rtl/verilog/ocidec-2/atahost_top.v
./ata/trunk/rtl/verilog/ocidec-2/ro_cnt.v
./ata/trunk/rtl/verilog/ocidec-2/revision_history.txt
./ata/trunk/rtl/verilog/ocidec-2/timescale.v
./ata/trunk/rtl/verilog/ocidec-2/ud_cnt.v
./ata/trunk/rtl/verilog/ocidec-2/atahost_pio_actrl.v
./ata/trunk/rtl/verilog/ocidec-2/atahost_wb_slave.v
./ata/trunk/rtl/vhdl/
./ata/trunk/rtl/vhdl/ocidec3/
./ata/trunk/rtl/vhdl/ocidec3/ro_cnt.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_dma_actrl.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_top.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_controller.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_pio_controller.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_reg_buf.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_fifo.vhd
./ata/trunk/rtl/vhdl/ocidec3/revision_history.txt
./ata/trunk/rtl/vhdl/ocidec3/atahost_wb_slave.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_lfsr.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_dma_tctrl.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_pio_actrl.vhd
./ata/trunk/rtl/vhdl/ocidec3/ud_cnt.vhd
./ata/trunk/rtl/vhdl/ocidec3/atahost_pio_tctrl.vhd
./ata/trunk/rtl/vhdl/ocidec1/
./ata/trunk/rtl/vhdl/ocidec1/ro_cnt.vhd
./ata/trunk/rtl/vhdl/ocidec1/atahost_top.vhd
./ata/trunk/rtl/vhdl/ocidec1/atahost_controller.vhd
./ata/trunk/rtl/vhdl/ocidec1/revision_history.txt
./ata/trunk/rtl/vhdl/ocidec1/atahost_wb_slave.vhd
./ata/trunk/rtl/vhdl/ocidec1/ud_cnt.vhd
./ata/trunk/rtl/vhdl/ocidec1/atahost_pio_tctrl.vhd
./ata/trunk/rtl/vhdl/ocidec2/
./ata/trunk/rtl/vhdl/ocidec2/ro_cnt.vhd
./ata/trunk/rtl/vhdl/ocidec2/atahost_top.vhd
./ata/trunk/rtl/vhdl/ocidec2/atahost_controller.vhd
./ata/trunk/rtl/vhdl/ocidec2/revision_history.txt
./ata/trunk/rtl/vhdl/ocidec2/atahost_wb_slave.vhd
./ata/trunk/rtl/vhdl/ocidec2/atahost_pio_actrl.vhd
./ata/trunk/rtl/vhdl/ocidec2/ud_cnt.vhd
./ata/trunk/rtl/vhdl/ocidec2/atahost_pio_tctrl.vhd
./ata/trunk/sim/
./ata/trunk/sim/rtl_sim/
./ata/trunk/sim/rtl_sim/bin/
./ata/trunk/sim/rtl_sim/bin/Makefile
./ata/trunk/syn/
./ata/trunk/syn/bin/
./ata/trunk/syn/bin/read.dc
./ata/trunk/syn/bin/lib_spec.dc
./ata/trunk/syn/bin/design_spec.dc
./ata/trunk/syn/bin/comp.dc

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