文件名称:test_SPI
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- 上传时间:2012-11-16
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文件大小:2.35mb
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串口verilog代码,包括测试环境,仿真环境。-SPI design,verilog code,incude test and simulation scr ipt。
相关搜索: Verilog SPI
(系统自动生成,下载前可以参看下载内容)
下载文件列表
test_SPI/display_SR420361K_2.v.bak
test_SPI/run.bat
test_SPI/file.list.bak
test_SPI/ncverilog.log
test_SPI/display_SR420361K_2.v
test_SPI/clk_div.v
test_SPI/file.list
test_SPI/LED_SR420361K_2.v.bak
test_SPI/LED_SR420361K_2.v
test_SPI/bin_segment.v.bak
test_SPI/bin_segment.v
test_SPI/test_SPI.v.bak
test_SPI/test_SPI.v
test_SPI/keys_scan.v.bak
test_SPI/keys_scan.v
test_SPI/test_bench.v.bak
test_SPI/test_bench.v
test_SPI/SPI.v.bak
test_SPI/SPI.v
test_SPI/原理图/Protel Schematic.pdf
test_SPI/原理图/STC811L.PDF
test_SPI/原理图/STC812L.PDF
test_SPI/原理图/EDAV2.PDF
test_SPI/原理图/MyLib.ddb
test_SPI/原理图/PROTEL PCB库.rar
test_SPI/原理图/工程中有原理图库和PCB图库仅供参照.txt
test_SPI/原理图/布局.pdf
test_SPI/原理图/核心板尺寸标注.bmp
test_SPI/原理图/MyLib.ldb
test_SPI/原理图/PROTEL PCB库/所有图库仅供参考.txt
test_SPI/原理图/PROTEL PCB库/MYPCBLIB.LIB
test_SPI/FPGA/display_SR420361K_2.v
test_SPI/FPGA/SPI.v
test_SPI/FPGA/test_SPI.qpf
test_SPI/FPGA/test_SPI.qsf
test_SPI/FPGA/test_SPI.map.rpt
test_SPI/FPGA/test_SPI.flow.rpt
test_SPI/FPGA/test_SPI.map.summary
test_SPI/FPGA/test_SPI.map.eqn
test_SPI/FPGA/test_SPI.fit.eqn
test_SPI/FPGA/test_SPI.pin
test_SPI/FPGA/test_SPI.fit.rpt
test_SPI/FPGA/test_SPI.fit.summary
test_SPI/FPGA/test_SPI.pof
test_SPI/FPGA/test_SPI.asm.rpt
test_SPI/FPGA/test_SPI.tan.summary
test_SPI/FPGA/test_SPI.tan.rpt
test_SPI/FPGA/test_SPI.done
test_SPI/FPGA/test_SPI.sof
test_SPI/FPGA/test_SPI.qws
test_SPI/FPGA/clk_div.v
test_SPI/FPGA/test_SPI.dpf
test_SPI/FPGA/LED_SR420361K_2.v.bak
test_SPI/FPGA/test_SPI.cdf
test_SPI/FPGA/LED_SR420361K_2.v
test_SPI/FPGA/test_SPI.v.bak
test_SPI/FPGA/test_SPI.v
test_SPI/FPGA/bin_segment.v.bak
test_SPI/FPGA/bin_segment.v
test_SPI/FPGA/keys_scan.v.bak
test_SPI/FPGA/keys_scan.v
test_SPI/FPGA/db/test_SPI.db_info
test_SPI/FPGA/db/test_SPI.fit.qmsg
test_SPI/FPGA/db/test_SPI.rtlv_sg_swap.cdb
test_SPI/FPGA/db/test_SPI.cmp.cdb
test_SPI/FPGA/db/test_SPI.map.qmsg
test_SPI/FPGA/db/test_SPI.cbx.xml
test_SPI/FPGA/db/test_SPI.cmp.qrpt
test_SPI/FPGA/db/test_SPI.hif
test_SPI/FPGA/db/test_SPI.asm.qmsg
test_SPI/FPGA/db/test_SPI.tan.qmsg
test_SPI/FPGA/db/test_SPI.(5).cnf.cdb
test_SPI/FPGA/db/test_SPI.(5).cnf.hdb
test_SPI/FPGA/db/test_SPI.(0).cnf.cdb
test_SPI/FPGA/db/test_SPI.(0).cnf.hdb
test_SPI/FPGA/db/test_SPI.(4).cnf.cdb
test_SPI/FPGA/db/test_SPI.(1).cnf.cdb
test_SPI/FPGA/db/test_SPI.(1).cnf.hdb
test_SPI/FPGA/db/test_SPI.(4).cnf.hdb
test_SPI/FPGA/db/test_SPI.pre_map.cdb
test_SPI/FPGA/db/test_SPI.map.cdb
test_SPI/FPGA/db/test_SPI.hier_info
test_SPI/FPGA/db/test_SPI.rtlv_sg.cdb
test_SPI/FPGA/db/test_SPI.sgdiff.cdb
test_SPI/FPGA/db/test_SPI.sgdiff.hdb
test_SPI/FPGA/db/test_SPI.(6).cnf.cdb
test_SPI/FPGA/db/test_SPI.(6).cnf.hdb
test_SPI/FPGA/db/test_SPI.rtlv.hdb
test_SPI/FPGA/db/test_SPI.psp
test_SPI/FPGA/db/test_SPI.dbp
test_SPI/FPGA/db/test_SPI.(2).cnf.cdb
test_SPI/FPGA/db/test_SPI.pre_map.hdb
test_SPI/FPGA/db/test_SPI.(2).cnf.hdb
test_SPI/FPGA/db/test_SPI.cmp.hdb
test_SPI/FPGA/db/add_sub_rnh.tdf
test_SPI/FPGA/db/test_SPI.map.hdb
test_SPI/FPGA/db/test_SPI.eco.cdb
test_SPI/FPGA/db/test_SPI.sld_design_entry_dsc.sci
test_SPI/FPGA/db/test_SPI.cmp.tdb
test_SPI/FPGA/db/test_SPI.signalprobe.cdb
test_SPI/FPGA/db/test_SPI.cmp.rdb
test_SPI/FPGA/db/test_SPI.cmp0.ddb
test_SPI/FPGA/db/test_SPI.sld_design_entry.sci
test_SPI/FPGA/db/add_sub_1dh.tdf
test_SPI/FPGA/db/test_SPI.syn_hier_info
test_SPI/FPGA/db/test_SPI.(3).cnf.cdb
test_SPI/FPGA/db/test_SPI.(3).cnf.hdb
test_SPI/inca_libs/.ncv.lock
test_SPI/inca_libs/cds.lib
test_SPI/inca_libs/hdl.var
test_SPI/inca_libs/snap.nc/.ncv.lock
test_SPI/inca_libs/snap.nc/ncverilog.args
test_SPI/inca_libs/snap.nc/.hard.args
test_SPI/inca_libs/snap.nc/.elab.args
test_SPI/inca_libs/snap.nc/bind.lst
test_SPI/inca_libs/snap.nc/cds.lib
test_SPI/inca_libs/snap.nc/hdl.var
test_SPI/inca_libs/worklib/cdsinfo.tag
test_SPI/inca_libs/worklib/.cdsvmod
test_SPI/inca_libs/worklib/.inca.db.151.win32
test_SPI/inca_libs/worklib/inca.win32.151.pak
test_SPI/sim/dsn/test_bench-1.dsn
test_SPI/sim/dsn/simvision.sv
test_SPI/sim/dsn/simvision1.sv
test_SPI/sim/dsn/test_bench-1-1.trn
test_SPI/原理图/PROTEL PCB库
test_SPI/FPGA/db
test_SPI/inca_libs/snap.nc
test_SPI/inca_libs/worklib
test_SPI/sim/dsn
test_SPI/原理图
test_SPI/FPGA
test_SPI/inca_libs
test_SPI/sim
test_SPI
test_SPI/run.bat
test_SPI/file.list.bak
test_SPI/ncverilog.log
test_SPI/display_SR420361K_2.v
test_SPI/clk_div.v
test_SPI/file.list
test_SPI/LED_SR420361K_2.v.bak
test_SPI/LED_SR420361K_2.v
test_SPI/bin_segment.v.bak
test_SPI/bin_segment.v
test_SPI/test_SPI.v.bak
test_SPI/test_SPI.v
test_SPI/keys_scan.v.bak
test_SPI/keys_scan.v
test_SPI/test_bench.v.bak
test_SPI/test_bench.v
test_SPI/SPI.v.bak
test_SPI/SPI.v
test_SPI/原理图/Protel Schematic.pdf
test_SPI/原理图/STC811L.PDF
test_SPI/原理图/STC812L.PDF
test_SPI/原理图/EDAV2.PDF
test_SPI/原理图/MyLib.ddb
test_SPI/原理图/PROTEL PCB库.rar
test_SPI/原理图/工程中有原理图库和PCB图库仅供参照.txt
test_SPI/原理图/布局.pdf
test_SPI/原理图/核心板尺寸标注.bmp
test_SPI/原理图/MyLib.ldb
test_SPI/原理图/PROTEL PCB库/所有图库仅供参考.txt
test_SPI/原理图/PROTEL PCB库/MYPCBLIB.LIB
test_SPI/FPGA/display_SR420361K_2.v
test_SPI/FPGA/SPI.v
test_SPI/FPGA/test_SPI.qpf
test_SPI/FPGA/test_SPI.qsf
test_SPI/FPGA/test_SPI.map.rpt
test_SPI/FPGA/test_SPI.flow.rpt
test_SPI/FPGA/test_SPI.map.summary
test_SPI/FPGA/test_SPI.map.eqn
test_SPI/FPGA/test_SPI.fit.eqn
test_SPI/FPGA/test_SPI.pin
test_SPI/FPGA/test_SPI.fit.rpt
test_SPI/FPGA/test_SPI.fit.summary
test_SPI/FPGA/test_SPI.pof
test_SPI/FPGA/test_SPI.asm.rpt
test_SPI/FPGA/test_SPI.tan.summary
test_SPI/FPGA/test_SPI.tan.rpt
test_SPI/FPGA/test_SPI.done
test_SPI/FPGA/test_SPI.sof
test_SPI/FPGA/test_SPI.qws
test_SPI/FPGA/clk_div.v
test_SPI/FPGA/test_SPI.dpf
test_SPI/FPGA/LED_SR420361K_2.v.bak
test_SPI/FPGA/test_SPI.cdf
test_SPI/FPGA/LED_SR420361K_2.v
test_SPI/FPGA/test_SPI.v.bak
test_SPI/FPGA/test_SPI.v
test_SPI/FPGA/bin_segment.v.bak
test_SPI/FPGA/bin_segment.v
test_SPI/FPGA/keys_scan.v.bak
test_SPI/FPGA/keys_scan.v
test_SPI/FPGA/db/test_SPI.db_info
test_SPI/FPGA/db/test_SPI.fit.qmsg
test_SPI/FPGA/db/test_SPI.rtlv_sg_swap.cdb
test_SPI/FPGA/db/test_SPI.cmp.cdb
test_SPI/FPGA/db/test_SPI.map.qmsg
test_SPI/FPGA/db/test_SPI.cbx.xml
test_SPI/FPGA/db/test_SPI.cmp.qrpt
test_SPI/FPGA/db/test_SPI.hif
test_SPI/FPGA/db/test_SPI.asm.qmsg
test_SPI/FPGA/db/test_SPI.tan.qmsg
test_SPI/FPGA/db/test_SPI.(5).cnf.cdb
test_SPI/FPGA/db/test_SPI.(5).cnf.hdb
test_SPI/FPGA/db/test_SPI.(0).cnf.cdb
test_SPI/FPGA/db/test_SPI.(0).cnf.hdb
test_SPI/FPGA/db/test_SPI.(4).cnf.cdb
test_SPI/FPGA/db/test_SPI.(1).cnf.cdb
test_SPI/FPGA/db/test_SPI.(1).cnf.hdb
test_SPI/FPGA/db/test_SPI.(4).cnf.hdb
test_SPI/FPGA/db/test_SPI.pre_map.cdb
test_SPI/FPGA/db/test_SPI.map.cdb
test_SPI/FPGA/db/test_SPI.hier_info
test_SPI/FPGA/db/test_SPI.rtlv_sg.cdb
test_SPI/FPGA/db/test_SPI.sgdiff.cdb
test_SPI/FPGA/db/test_SPI.sgdiff.hdb
test_SPI/FPGA/db/test_SPI.(6).cnf.cdb
test_SPI/FPGA/db/test_SPI.(6).cnf.hdb
test_SPI/FPGA/db/test_SPI.rtlv.hdb
test_SPI/FPGA/db/test_SPI.psp
test_SPI/FPGA/db/test_SPI.dbp
test_SPI/FPGA/db/test_SPI.(2).cnf.cdb
test_SPI/FPGA/db/test_SPI.pre_map.hdb
test_SPI/FPGA/db/test_SPI.(2).cnf.hdb
test_SPI/FPGA/db/test_SPI.cmp.hdb
test_SPI/FPGA/db/add_sub_rnh.tdf
test_SPI/FPGA/db/test_SPI.map.hdb
test_SPI/FPGA/db/test_SPI.eco.cdb
test_SPI/FPGA/db/test_SPI.sld_design_entry_dsc.sci
test_SPI/FPGA/db/test_SPI.cmp.tdb
test_SPI/FPGA/db/test_SPI.signalprobe.cdb
test_SPI/FPGA/db/test_SPI.cmp.rdb
test_SPI/FPGA/db/test_SPI.cmp0.ddb
test_SPI/FPGA/db/test_SPI.sld_design_entry.sci
test_SPI/FPGA/db/add_sub_1dh.tdf
test_SPI/FPGA/db/test_SPI.syn_hier_info
test_SPI/FPGA/db/test_SPI.(3).cnf.cdb
test_SPI/FPGA/db/test_SPI.(3).cnf.hdb
test_SPI/inca_libs/.ncv.lock
test_SPI/inca_libs/cds.lib
test_SPI/inca_libs/hdl.var
test_SPI/inca_libs/snap.nc/.ncv.lock
test_SPI/inca_libs/snap.nc/ncverilog.args
test_SPI/inca_libs/snap.nc/.hard.args
test_SPI/inca_libs/snap.nc/.elab.args
test_SPI/inca_libs/snap.nc/bind.lst
test_SPI/inca_libs/snap.nc/cds.lib
test_SPI/inca_libs/snap.nc/hdl.var
test_SPI/inca_libs/worklib/cdsinfo.tag
test_SPI/inca_libs/worklib/.cdsvmod
test_SPI/inca_libs/worklib/.inca.db.151.win32
test_SPI/inca_libs/worklib/inca.win32.151.pak
test_SPI/sim/dsn/test_bench-1.dsn
test_SPI/sim/dsn/simvision.sv
test_SPI/sim/dsn/simvision1.sv
test_SPI/sim/dsn/test_bench-1-1.trn
test_SPI/原理图/PROTEL PCB库
test_SPI/FPGA/db
test_SPI/inca_libs/snap.nc
test_SPI/inca_libs/worklib
test_SPI/sim/dsn
test_SPI/原理图
test_SPI/FPGA
test_SPI/inca_libs
test_SPI/sim
test_SPI
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