文件名称:quaddecoder_verilog_ise11.2_used_09042010
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Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File.
The Pinout is descr ipted in the Constrained file quad.ucf.
To use them, you need teh XC9536 and a clock source that s 4 times faster than the fastes signal that the incremental encoder can creates. IThe clock source frequency is uncritical. For manuel rotated incremental encoder like radio VFO oder other tuning knob, a simple TTL oscillator with about 1Mhz (i use 1.8432Mhz and tested 32768Khz) works brilliant.
For very fast decoding, this core is not good enought because there are no Filter FlipFlops are programmed to suppress noises on the Channel A/B Lines.-Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File.
The Pinout is descr ipted in the Constrained file quad.ucf.
To use them, you need teh XC9536 and a clock source that s 4 times faster than the fastes signal that the incremental encoder can creates. IThe clock source frequency is uncritical. For manuel rotated incremental encoder like radio VFO oder other tuning knob, a simple TTL oscillator with about 1Mhz (i use 1.8432Mhz and tested 32768Khz) works brilliant.
For very fast decoding, this core is not good enought because there are no Filter FlipFlops are programmed to suppress noises on the Channel A/B Lines.
The Pinout is descr ipted in the Constrained file quad.ucf.
To use them, you need teh XC9536 and a clock source that s 4 times faster than the fastes signal that the incremental encoder can creates. IThe clock source frequency is uncritical. For manuel rotated incremental encoder like radio VFO oder other tuning knob, a simple TTL oscillator with about 1Mhz (i use 1.8432Mhz and tested 32768Khz) works brilliant.
For very fast decoding, this core is not good enought because there are no Filter FlipFlops are programmed to suppress noises on the Channel A/B Lines.-Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File.
The Pinout is descr ipted in the Constrained file quad.ucf.
To use them, you need teh XC9536 and a clock source that s 4 times faster than the fastes signal that the incremental encoder can creates. IThe clock source frequency is uncritical. For manuel rotated incremental encoder like radio VFO oder other tuning knob, a simple TTL oscillator with about 1Mhz (i use 1.8432Mhz and tested 32768Khz) works brilliant.
For very fast decoding, this core is not good enought because there are no Filter FlipFlops are programmed to suppress noises on the Channel A/B Lines.
相关搜索: xc9536
cpld ttl
incremental
Quadrature encoder Veril
quadrature decoder
Verilog Radio
QuadDecoder verilog
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quaddecoder_verilog_ise11.2_used_09042010/main.v
quaddecoder_verilog_ise11.2_used_09042010/quad.ipf
quaddecoder_verilog_ise11.2_used_09042010/quad.jed.ok
quaddecoder_verilog_ise11.2_used_09042010/quad.rar
quaddecoder_verilog_ise11.2_used_09042010/quad.ucf
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2.gise
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2.ise
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2.xise
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2_xdb/tmp/ise/version
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject
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quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2_xdb/tmp/ise/__REGISTRY__/Autonym/regkeys
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2_xdb/tmp/ise/__REGISTRY__/bitgen/regkeys
quaddecoder_verilog_ise11.2_us
quaddecoder_verilog_ise11.2_used_09042010/quad.ipf
quaddecoder_verilog_ise11.2_used_09042010/quad.jed.ok
quaddecoder_verilog_ise11.2_used_09042010/quad.rar
quaddecoder_verilog_ise11.2_used_09042010/quad.ucf
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2.gise
quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2.ise
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quaddecoder_verilog_ise11.2_used_09042010/quaddecoder_verilog_ise11.2_xdb/tmp/ise/__REGISTRY__/bitgen/regkeys
quaddecoder_verilog_ise11.2_us
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