CDN加速镜像 | 设为首页 | 加入收藏夹
当前位置: 首页 资源下载 源码下载 数值算法/人工智能 压缩解压

文件名称:LCD1602_Verilog

  • 所属分类:
  • 标签属性:
  • 上传时间:
    2012-11-16
  • 文件大小:
    749.75kb
  • 已下载:
    0次
  • 提 供 者:
  • 相关连接:
  • 下载说明:
    别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容来自于网络,使用问题请自行百度

1602源代码 Verilog 文件调用的全部程序-1602 Verilog
(系统自动生成,下载前可以参看下载内容)

下载文件列表

LCD1602_Verilog/.sopc_builder/filters.xml
LCD1602_Verilog/Clock_Gen.v
LCD1602_Verilog/Clock_Gen.v.bak
LCD1602_Verilog/db/LCD_Top.(0).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(0).cnf.hdb
LCD1602_Verilog/db/LCD_Top.(1).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(1).cnf.hdb
LCD1602_Verilog/db/LCD_Top.(2).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(2).cnf.hdb
LCD1602_Verilog/db/LCD_Top.asm.qmsg
LCD1602_Verilog/db/LCD_Top.asm_labs.ddb
LCD1602_Verilog/db/LCD_Top.cbx.xml
LCD1602_Verilog/db/LCD_Top.cmp.bpm
LCD1602_Verilog/db/LCD_Top.cmp.cdb
LCD1602_Verilog/db/LCD_Top.cmp.ecobp
LCD1602_Verilog/db/LCD_Top.cmp.hdb
LCD1602_Verilog/db/LCD_Top.cmp.kpt
LCD1602_Verilog/db/LCD_Top.cmp.logdb
LCD1602_Verilog/db/LCD_Top.cmp.rdb
LCD1602_Verilog/db/LCD_Top.cmp.tdb
LCD1602_Verilog/db/LCD_Top.cmp0.ddb
LCD1602_Verilog/db/LCD_Top.cmp2.ddb
LCD1602_Verilog/db/LCD_Top.cmp_merge.kpt
LCD1602_Verilog/db/LCD_Top.db_info
LCD1602_Verilog/db/LCD_Top.eco.cdb
LCD1602_Verilog/db/LCD_Top.fit.qmsg
LCD1602_Verilog/db/LCD_Top.hier_info
LCD1602_Verilog/db/LCD_Top.hif
LCD1602_Verilog/db/LCD_Top.lpc.html
LCD1602_Verilog/db/LCD_Top.lpc.rdb
LCD1602_Verilog/db/LCD_Top.lpc.txt
LCD1602_Verilog/db/LCD_Top.map.bpm
LCD1602_Verilog/db/LCD_Top.map.cdb
LCD1602_Verilog/db/LCD_Top.map.ecobp
LCD1602_Verilog/db/LCD_Top.map.hdb
LCD1602_Verilog/db/LCD_Top.map.kpt
LCD1602_Verilog/db/LCD_Top.map.logdb
LCD1602_Verilog/db/LCD_Top.map.qmsg
LCD1602_Verilog/db/LCD_Top.map_bb.cdb
LCD1602_Verilog/db/LCD_Top.map_bb.hdb
LCD1602_Verilog/db/LCD_Top.map_bb.logdb
LCD1602_Verilog/db/LCD_Top.pre_map.cdb
LCD1602_Verilog/db/LCD_Top.pre_map.hdb
LCD1602_Verilog/db/LCD_Top.rtlv.hdb
LCD1602_Verilog/db/LCD_Top.rtlv_sg.cdb
LCD1602_Verilog/db/LCD_Top.rtlv_sg_swap.cdb
LCD1602_Verilog/db/LCD_Top.sgdiff.cdb
LCD1602_Verilog/db/LCD_Top.sgdiff.hdb
LCD1602_Verilog/db/LCD_Top.sld_design_entry.sci
LCD1602_Verilog/db/LCD_Top.sld_design_entry_dsc.sci
LCD1602_Verilog/db/LCD_Top.smp_dump.txt
LCD1602_Verilog/db/LCD_Top.syn_hier_info
LCD1602_Verilog/db/LCD_Top.tan.qmsg
LCD1602_Verilog/db/LCD_Top.tis_db_list.ddb
LCD1602_Verilog/db/LCD_Top.tmw_info
LCD1602_Verilog/db/LCD_Top_global_asgn_op.abo
LCD1602_Verilog/db/prev_cmp_LCD_Top.asm.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.fit.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.map.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.tan.qmsg
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.atm
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.dfp
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.hdbx
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.kpt
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.logdb
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.rcf
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.atm
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.dpi
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.hdbx
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.kpt
LCD1602_Verilog/incremental_db/README
LCD1602_Verilog/LCD_Driver.v
LCD1602_Verilog/LCD_Driver.v.bak
LCD1602_Verilog/LCD_Top.asm.rpt
LCD1602_Verilog/LCD_Top.cdf
LCD1602_Verilog/LCD_Top.done
LCD1602_Verilog/LCD_Top.dpf
LCD1602_Verilog/LCD_Top.fit.rpt
LCD1602_Verilog/LCD_Top.fit.smsg
LCD1602_Verilog/LCD_Top.fit.summary
LCD1602_Verilog/LCD_Top.flow.rpt
LCD1602_Verilog/LCD_Top.map.rpt
LCD1602_Verilog/LCD_Top.map.summary
LCD1602_Verilog/LCD_Top.pin
LCD1602_Verilog/LCD_Top.pof
LCD1602_Verilog/LCD_Top.qpf
LCD1602_Verilog/LCD_Top.qsf
LCD1602_Verilog/LCD_Top.qsf.bak
LCD1602_Verilog/LCD_Top.qws
LCD1602_Verilog/LCD_Top.sof
LCD1602_Verilog/LCD_Top.tan.rpt
LCD1602_Verilog/LCD_Top.tan.summary
LCD1602_Verilog/LCD_Top.v
LCD1602_Verilog/LCD_Top.v.bak
LCD1602_Verilog/LCD_Top_assignment_defaults.qdf
LCD1602_Verilog/sopc_builder_log.txt
LCD1602_Verilog/incremental_db/compiled_partitions
LCD1602_Verilog/.sopc_builder
LCD1602_Verilog/db
LCD1602_Verilog/incremental_db
LCD1602_Verilog

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台,只提供交流渠道,下载内容来自于网络,除下载问题外,其它问题请自行百度。更多...
  • 本站已设置防盗链,请勿用迅雷、QQ旋风等下载软件下载资源,下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载,请稍后再次尝试;或换浏览器;或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎,请到消费记录里找到下载记录反馈给我们,经确认后退回积分.
  • 如下载前有疑问,可以通过点击"提供者"的名字,查看对方的联系方式,联系对方咨询.

相关评论

暂无评论内容.

发表评论

*快速评论: 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内  容:
*验 证 码:
搜珍网 www.dssz.com

浏览历史记录

关闭