内核通过保持一个称为数据缓冲区高速缓冲的内部数据缓冲区来减小对芯片的存取频度。高速缓冲含有最近被使用过的串行Flash的数据。当从芯片中读数据的时候，内核试图先从高速缓冲中读取。如果数据已经在该高速缓冲中，则内核可以不必从芯片中读取数据。如果数据不在该高速缓冲中，则内核从芯片上读数据，并将其缓冲起来，这样下次使用时就不需要再从芯片中读取了。描述的就是数据缓冲区的管理。-Core by maintaining a data buffer as an internal data buffer cache to reduce the access frequency of the chip. Cache contains recently used data from the serial Flash. When reading data from the chip when the kernel trying to start cache read. If the data is already in the cache, the kernel can not read data from the chip. If the data is not in the cache, then the kernel to read data from the chip and the cushion up, so next time when they do not need to use the chip to read from a. Is described in the data buffer management.