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文件名称:FPGA_DDS

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    13.82mb
  • 已下载：
    0次
  • 提 供 者：
    乐****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于FPGA的DDS信号发生器产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-FPGA-based VHDL source DDS signal generator and the test stimulus file matlab model simulation in modelsim adopted under
相关搜索： FPGA_DDS.rar DDS Signal

(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.asm.rpt
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.bdf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.done
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.dpf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.fit.eqn
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.fit.rpt
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.fit.smsg
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.fit.summary
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.flow.rpt
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.jdi
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.map.eqn
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.map.rpt
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.map.summary
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.pin
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.pof
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.qpf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.qsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.qws
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.sof
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.tan.rpt
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core.tan.summary
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/8051_core_assignment_defaults.qdf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/addsub_core.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/addsub_cy.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/addsub_ovcy.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/altpll0.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/altpll0.cmp
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/altpll0.vhd
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/altpll0_wave0.jpg
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/altpll0_waveforms.html
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/alucore.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/alumux.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/ffg.hex
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/flow_led.hex
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/lamp1.hex
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/LEDLS.hex
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/TEST1.ASM
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/TEST1.BIN
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/TEST1.HEX
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/TEST1.LST
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/TEST2.ASM
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/TEST2.hex
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/ASM/TEST3.ASM
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/comb_divider.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/comb_mltplr.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/control_fsm.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/control_mem.bsf
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(0).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(0).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(1).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(1).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(10).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(10).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(11).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(11).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(12).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(12).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(13).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(13).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(14).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(14).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(15).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(15).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(16).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(16).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(17).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(17).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(18).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(18).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(19).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(19).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(2).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(2).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(20).cnf.cdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_design/db/8051_core.(20).cnf.hdb
FPGA_DDS/8051_core_FPGA_EP2C5T1448C/8051_desi

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