文件名称:usb_wr_Verilog
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- 上传时间:2012-11-16
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文件大小:31.14kb
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fpga ubs通讯模块 verlog语言
使用EZ-USB FX2-USB interface.
use EZ-USB FX2 carry out PC communication with FPGA by USB.
使用EZ-USB FX2-USB interface.
use EZ-USB FX2 carry out PC communication with FPGA by USB.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
usb_wr_Verilog/db/USB_wr.db_info
usb_wr_Verilog/read me.txt
usb_wr_Verilog/transcript
usb_wr_Verilog/USB_wr.asm.rpt
usb_wr_Verilog/USB_wr.cdf
usb_wr_Verilog/USB_wr.done
usb_wr_Verilog/USB_wr.dpf
usb_wr_Verilog/USB_wr.fit.smsg
usb_wr_Verilog/USB_wr.fit.summary
usb_wr_Verilog/USB_wr.flow.rpt
usb_wr_Verilog/USB_wr.jdi
usb_wr_Verilog/USB_wr.map.rpt
usb_wr_Verilog/USB_wr.map.summary
usb_wr_Verilog/USB_wr.merge.rpt
usb_wr_Verilog/USB_wr.pin
usb_wr_Verilog/USB_wr.qpf
usb_wr_Verilog/USB_wr.qsf
usb_wr_Verilog/USB_wr.qws
usb_wr_Verilog/USB_wr.tan.summary
usb_wr_Verilog/USB_wr.v
usb_wr_Verilog/USB_wr.v.bak
usb_wr_Verilog/db
usb_wr_Verilog
usb_wr_Verilog/read me.txt
usb_wr_Verilog/transcript
usb_wr_Verilog/USB_wr.asm.rpt
usb_wr_Verilog/USB_wr.cdf
usb_wr_Verilog/USB_wr.done
usb_wr_Verilog/USB_wr.dpf
usb_wr_Verilog/USB_wr.fit.smsg
usb_wr_Verilog/USB_wr.fit.summary
usb_wr_Verilog/USB_wr.flow.rpt
usb_wr_Verilog/USB_wr.jdi
usb_wr_Verilog/USB_wr.map.rpt
usb_wr_Verilog/USB_wr.map.summary
usb_wr_Verilog/USB_wr.merge.rpt
usb_wr_Verilog/USB_wr.pin
usb_wr_Verilog/USB_wr.qpf
usb_wr_Verilog/USB_wr.qsf
usb_wr_Verilog/USB_wr.qws
usb_wr_Verilog/USB_wr.tan.summary
usb_wr_Verilog/USB_wr.v
usb_wr_Verilog/USB_wr.v.bak
usb_wr_Verilog/db
usb_wr_Verilog
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