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文件名称:BER_examination

  • 所属分类：
    VHDL编程
  • 标签属性：
    [Text]
  • 上传时间：
    2012-11-16
  • 文件大小：
    488.46kb
  • 已下载：
    2次
  • 提 供 者：
    w****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

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基于FPGA的伪随机序列误码率检测，包括随机序列的发生，随机序列的接收统计。-FPGA-based pseudo-random sequence of bit error rate testing, including the occurrence of random sequence, random sequence to receive statistics.
相关搜索： bit error rate vhdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

clock_ctrl/clock_ctrl.qpf
clock_ctrl/clock_ctrl.qsf
clock_ctrl/db/cntr_qj7.tdf
clock_ctrl/db/clock_ctrl.db_info
clock_ctrl/db/clock_ctrl.cmp.cdb
clock_ctrl/db/clock_ctrl.tis_db_list.ddb
clock_ctrl/db/prev_cmp_clock_ctrl.map.qmsg
clock_ctrl/db/prev_cmp_clock_ctrl.fit.qmsg
clock_ctrl/db/clock_ctrl.cbx.xml
clock_ctrl/db/clock_ctrl.map_bb.logdb
clock_ctrl/db/clock_ctrl.fit.qmsg
clock_ctrl/db/prev_cmp_clock_ctrl.qmsg
clock_ctrl/db/clock_ctrl.sim.qmsg
clock_ctrl/db/clock_ctrl.map.qmsg
clock_ctrl/db/clock_ctrl.asm.qmsg
clock_ctrl/db/clock_ctrl.tan.qmsg
clock_ctrl/db/clock_ctrl.sim.hdb
clock_ctrl/db/cntr_ejb.tdf
clock_ctrl/db/clock_ctrl.sim.cvwf
clock_ctrl/db/prev_cmp_clock_ctrl.sim.qmsg
clock_ctrl/db/clock_ctrl.sim.rdb
clock_ctrl/db/clock_ctrl.cmp.logdb
clock_ctrl/db/mux_03e.tdf
clock_ctrl/db/clock_ctrl.cmp.ecobp
clock_ctrl/db/clock_ctrl.cmp_bb.logdb
clock_ctrl/db/clock_ctrl.eco.cdb
clock_ctrl/db/clock_ctrl.(0).cnf.cdb
clock_ctrl/db/clock_ctrl.(0).cnf.hdb
clock_ctrl/db/clock_ctrl.rtlv.hdb
clock_ctrl/db/clock_ctrl.pre_map.hdb
clock_ctrl/db/clock_ctrl.pre_map.cdb
clock_ctrl/db/prev_cmp_clock_ctrl.asm.qmsg
clock_ctrl/db/clock_ctrl.sgdiff.cdb
clock_ctrl/db/clock_ctrl.sgdiff.hdb
clock_ctrl/db/clock_ctrl.hif
clock_ctrl/db/prev_cmp_clock_ctrl.tan.qmsg
clock_ctrl/db/clock_ctrl.hier_info
clock_ctrl/db/clock_ctrl.rtlv_sg.cdb
clock_ctrl/db/clock_ctrl.cmp.bpm
clock_ctrl/db/clock_ctrl.map_bb.cdb
clock_ctrl/db/clock_ctrl.(17).cnf.cdb
clock_ctrl/db/clock_ctrl.psp
clock_ctrl/db/clock_ctrl.dbp
clock_ctrl/db/clock_ctrl.pss
clock_ctrl/db/clock_ctrl.(4).cnf.cdb
clock_ctrl/db/clock_ctrl.(4).cnf.hdb
clock_ctrl/db/clock_ctrl.(5).cnf.cdb
clock_ctrl/db/clock_ctrl.(5).cnf.hdb
clock_ctrl/db/clock_ctrl.syn_hier_info
clock_ctrl/db/scfifo_5a21.tdf
clock_ctrl/db/a_dpfifo_cg21.tdf
clock_ctrl/db/a_fefifo_56f.tdf
clock_ctrl/db/dpram_mt01.tdf
clock_ctrl/db/clock_ctrl.(17).cnf.hdb
clock_ctrl/db/clock_ctrl.map.ecobp
clock_ctrl/db/altsyncram_krj1.tdf
clock_ctrl/db/clock_ctrl.(6).cnf.cdb
clock_ctrl/db/clock_ctrl.(6).cnf.hdb
clock_ctrl/db/clock_ctrl.map_bb.hdb
clock_ctrl/db/clock_ctrl.(7).cnf.cdb
clock_ctrl/db/clock_ctrl.(7).cnf.hdb
clock_ctrl/db/clock_ctrl.(8).cnf.cdb
clock_ctrl/db/clock_ctrl.(8).cnf.hdb
clock_ctrl/db/clock_ctrl.(18).cnf.cdb
clock_ctrl/db/clock_ctrl.(9).cnf.cdb
clock_ctrl/db/clock_ctrl.(9).cnf.hdb
clock_ctrl/db/clock_ctrl.rtlv_sg_swap.cdb
clock_ctrl/db/clock_ctrl.(10).cnf.cdb
clock_ctrl/db/clock_ctrl.(10).cnf.hdb
clock_ctrl/db/clock_ctrl.(11).cnf.cdb
clock_ctrl/db/clock_ctrl.(11).cnf.hdb
clock_ctrl/db/clock_ctrl.(12).cnf.cdb
clock_ctrl/db/clock_ctrl.(12).cnf.hdb
clock_ctrl/db/clock_ctrl.(13).cnf.cdb
clock_ctrl/db/clock_ctrl.(13).cnf.hdb
clock_ctrl/db/clock_ctrl.(14).cnf.cdb
clock_ctrl/db/clock_ctrl.(14).cnf.hdb
clock_ctrl/db/clock_ctrl.cmp_bb.rcf
clock_ctrl/db/clock_ctrl.(15).cnf.cdb
clock_ctrl/db/clock_ctrl.(15).cnf.hdb
clock_ctrl/db/clock_ctrl.(16).cnf.cdb
clock_ctrl/db/clock_ctrl.(16).cnf.hdb
clock_ctrl/db/clock_ctrl.(18).cnf.hdb
clock_ctrl/db/clock_ctrl.sld_design_entry.sci
clock_ctrl/db/clock_ctrl.sld_design_entry_dsc.sci
clock_ctrl/db/clock_ctrl.map.logdb
clock_ctrl/db/clock_ctrl.map.cdb
clock_ctrl/db/clock_ctrl.map.hdb
clock_ctrl/db/clock_ctrl.map.bpm
clock_ctrl/db/clock_ctrl.asm_labs.ddb
clock_ctrl/db/clock_ctrl.signalprobe.cdb
clock_ctrl/db/clock_ctrl.cmp.tdb
clock_ctrl/db/clock_ctrl.cmp_bb.hdb
clock_ctrl/db/clock_ctrl.cmp.hdb
clock_ctrl/db/clock_ctrl.cmp_bb.cdb
clock_ctrl/db/clock_ctrl.cmp.rdb
clock_ctrl/db/clock_ctrl.cmp0.ddb
clock_ctrl/db/wed.wsf
clock_ctrl/db/clock_ctrl.eds_overflow
clock_ctrl/db/clock_ctrl.(1).cnf.cdb
clock_ctrl/db/clock_ctrl.(1).cnf.hdb
clock_ctrl/db/add_sub_evh.tdf
clock_ctrl/db/clock_ctrl.(2).cnf.cdb
clock_ctrl/db/clock_ctrl.(2).cnf.hdb
clock_ctrl/db/clock_ctrl.(3).cnf.cdb
clock_ctrl/db/clock_ctrl.(3).cnf.hdb
clock_ctrl/clock_ctrl.sim.rpt
clock_ctrl/clock_ctrl.vhd
clock_ctrl/clock_ctrl.vhd.bak
clock_ctrl/clock_ctrl.map.rpt
clock_ctrl/clock_ctrl.flow.rpt
clock_ctrl/clock_ctrl.fit.rpt
clock_ctrl/clock_ctrl.asm.rpt
clock_ctrl/clock_ctrl.tan.rpt
clock_ctrl/clock_ctrl.qws
clock_ctrl/clock_ctrl.map.summary
clock_ctrl/clock_ctrl.pin
clock_ctrl/clock_ctrl.fit.smsg
clock_ctrl/clock_ctrl.fit.summary
clock_ctrl/clock_ctrl.sof
clock_ctrl/clock_ctrl.pof
clock_ctrl/clock_ctrl.tan.summary
clock_ctrl/clock_ctrl.done
clock_ctrl/clock_ctrl.vwf
clock_ctrl/ADDER.vhd.bak
clock_ctrl/ADDER.vhd
clock_ctrl/fifo_component.vhd
clock_ctrl/mux2_1.vhd
clock_ctrl/fifo.vhd
clock_ctrl/dff1.vhd
clock_ctrl/prsg_9.vhd
clock_ctrl/db
clock_ctrl
clock_ctrl/sopc_builder_log.txt

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