文件名称:mydesign1
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用verilog实现求最大公因数的程序,包括完整的工程-Verilog seeking to achieve with the largest common factor of the process, including the complete works
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下载文件列表
mydesign1/csrc/filelist
mydesign1/csrc/hdr.h
mydesign1/csrc/Makefile
mydesign1/csrc/om1d_1.c
mydesign1/csrc/om1d_1.obj
mydesign1/csrc/vcspieces.incr
mydesign1/csrc/vcstype.incr
mydesign1/csrc/vcs_inlined_mod.incr
mydesign1/csrc/vcs_rebuild
mydesign1/csrc/xuyk.c
mydesign1/csrc/xuyk.obj
mydesign1/csrc/xuyk1.c
mydesign1/csrc/xuyk1.obj
mydesign1/db/add_sub_blh.tdf
mydesign1/db/GCD.(0).cnf.cdb
mydesign1/db/GCD.(0).cnf.hdb
mydesign1/db/GCD.(1).cnf.cdb
mydesign1/db/GCD.(1).cnf.hdb
mydesign1/db/GCD.(2).cnf.cdb
mydesign1/db/GCD.(2).cnf.hdb
mydesign1/db/GCD.(3).cnf.cdb
mydesign1/db/GCD.(3).cnf.hdb
mydesign1/db/GCD.(4).cnf.cdb
mydesign1/db/GCD.(4).cnf.hdb
mydesign1/db/GCD.(5).cnf.cdb
mydesign1/db/GCD.(5).cnf.hdb
mydesign1/db/GCD.ae.hdb
mydesign1/db/GCD.asm.qmsg
mydesign1/db/GCD.asm.rdb
mydesign1/db/GCD.asm_labs.ddb
mydesign1/db/GCD.cbx.xml
mydesign1/db/GCD.cmp.bpm
mydesign1/db/GCD.cmp.cdb
mydesign1/db/GCD.cmp.ecobp
mydesign1/db/GCD.cmp.hdb
mydesign1/db/GCD.cmp.kpt
mydesign1/db/GCD.cmp.logdb
mydesign1/db/GCD.cmp.rdb
mydesign1/db/GCD.cmp.tdb
mydesign1/db/GCD.cmp0.ddb
mydesign1/db/GCD.cmp_merge.kpt
mydesign1/db/GCD.db_info
mydesign1/db/GCD.eco.cdb
mydesign1/db/GCD.eda.qmsg
mydesign1/db/GCD.eds_overflow
mydesign1/db/GCD.fit.qmsg
mydesign1/db/GCD.hier_info
mydesign1/db/GCD.hif
mydesign1/db/GCD.lpc.html
mydesign1/db/GCD.lpc.rdb
mydesign1/db/GCD.lpc.txt
mydesign1/db/GCD.map.bpm
mydesign1/db/GCD.map.cdb
mydesign1/db/GCD.map.ecobp
mydesign1/db/GCD.map.hdb
mydesign1/db/GCD.map.kpt
mydesign1/db/GCD.map.logdb
mydesign1/db/GCD.map.qmsg
mydesign1/db/GCD.map_bb.cdb
mydesign1/db/GCD.map_bb.hdb
mydesign1/db/GCD.map_bb.logdb
mydesign1/db/GCD.pre_map.cdb
mydesign1/db/GCD.pre_map.hdb
mydesign1/db/GCD.rpp.qmsg
mydesign1/db/GCD.rtlv.hdb
mydesign1/db/GCD.rtlv_sg.cdb
mydesign1/db/GCD.rtlv_sg_swap.cdb
mydesign1/db/GCD.sgate.rvd
mydesign1/db/GCD.sgate_sm.rvd
mydesign1/db/GCD.sgdiff.cdb
mydesign1/db/GCD.sgdiff.hdb
mydesign1/db/GCD.sim.cvwf
mydesign1/db/GCD.sim.hdb
mydesign1/db/GCD.sim.qmsg
mydesign1/db/GCD.sim.rdb
mydesign1/db/GCD.sld_design_entry.sci
mydesign1/db/GCD.sld_design_entry_dsc.sci
mydesign1/db/GCD.smart_action.txt
mydesign1/db/GCD.smp_dump.txt
mydesign1/db/GCD.syn_hier_info
mydesign1/db/GCD.tan.qmsg
mydesign1/db/GCD.tis_db_list.ddb
mydesign1/db/GCD.tmw_info
mydesign1/db/logic_util_heursitic.dat
mydesign1/db/mux_qbc.tdf
mydesign1/db/prev_cmp_GCD.asm.qmsg
mydesign1/db/prev_cmp_GCD.eda.qmsg
mydesign1/db/prev_cmp_GCD.fit.qmsg
mydesign1/db/prev_cmp_GCD.map.qmsg
mydesign1/db/prev_cmp_GCD.qmsg
mydesign1/db/prev_cmp_GCD.sim.qmsg
mydesign1/db/prev_cmp_GCD.tan.qmsg
mydesign1/db/wed.wsf
mydesign1/dc_fsm.v
mydesign1/dc_fsm.v.bak
mydesign1/GCD.asm.rpt
mydesign1/GCD.done
mydesign1/GCD.eda.rpt
mydesign1/GCD.fit.rpt
mydesign1/GCD.fit.smsg
mydesign1/GCD.fit.summary
mydesign1/GCD.flow.rpt
mydesign1/GCD.map.rpt
mydesign1/GCD.map.summary
mydesign1/GCD.pin
mydesign1/GCD.pof
mydesign1/GCD.qpf
mydesign1/GCD.qsf
mydesign1/GCD.qws
mydesign1/GCD.sim.rpt
mydesign1/GCD.sof
mydesign1/GCD.tan.rpt
mydesign1/GCD.tan.summary
mydesign1/GCD.v
mydesign1/GCD.v.bak
mydesign1/GCD.vwf
mydesign1/gcdGCDUnitDpatch_sstr.v
mydesign1/gcdGCDUnitDpatch_sstr.v.bak
mydesign1/GCD_assignment_defaults.qdf
mydesign1/GCD_nativelink_simulation.rpt
mydesign1/GCD_tb.v
mydesign1/GCD_tb.v.bak
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.cdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.dfp
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.hdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.kpt
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.logdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.rcfdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.re.rcfdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.cdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.dpi
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.hdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.kpt
mydesign1/incremental_db/README
mydesign1/simulation/modelsim/cycloneii_atoms.v
mydesign1/simulation/modelsim/GCD.sft
mydesign1/simulation/modelsim/GCD.vo
mydesign1/simulation/modelsim/GCD_modelsim.xrf
mydesign1/simulation/modelsim/GCD_run_msim_gate_verilog.do
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak1
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak10
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak11
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak2
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak3
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak4
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak5
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak6
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak7
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak8
mydesign1/simulation/modelsim/GCD_run_
mydesign1/csrc/hdr.h
mydesign1/csrc/Makefile
mydesign1/csrc/om1d_1.c
mydesign1/csrc/om1d_1.obj
mydesign1/csrc/vcspieces.incr
mydesign1/csrc/vcstype.incr
mydesign1/csrc/vcs_inlined_mod.incr
mydesign1/csrc/vcs_rebuild
mydesign1/csrc/xuyk.c
mydesign1/csrc/xuyk.obj
mydesign1/csrc/xuyk1.c
mydesign1/csrc/xuyk1.obj
mydesign1/db/add_sub_blh.tdf
mydesign1/db/GCD.(0).cnf.cdb
mydesign1/db/GCD.(0).cnf.hdb
mydesign1/db/GCD.(1).cnf.cdb
mydesign1/db/GCD.(1).cnf.hdb
mydesign1/db/GCD.(2).cnf.cdb
mydesign1/db/GCD.(2).cnf.hdb
mydesign1/db/GCD.(3).cnf.cdb
mydesign1/db/GCD.(3).cnf.hdb
mydesign1/db/GCD.(4).cnf.cdb
mydesign1/db/GCD.(4).cnf.hdb
mydesign1/db/GCD.(5).cnf.cdb
mydesign1/db/GCD.(5).cnf.hdb
mydesign1/db/GCD.ae.hdb
mydesign1/db/GCD.asm.qmsg
mydesign1/db/GCD.asm.rdb
mydesign1/db/GCD.asm_labs.ddb
mydesign1/db/GCD.cbx.xml
mydesign1/db/GCD.cmp.bpm
mydesign1/db/GCD.cmp.cdb
mydesign1/db/GCD.cmp.ecobp
mydesign1/db/GCD.cmp.hdb
mydesign1/db/GCD.cmp.kpt
mydesign1/db/GCD.cmp.logdb
mydesign1/db/GCD.cmp.rdb
mydesign1/db/GCD.cmp.tdb
mydesign1/db/GCD.cmp0.ddb
mydesign1/db/GCD.cmp_merge.kpt
mydesign1/db/GCD.db_info
mydesign1/db/GCD.eco.cdb
mydesign1/db/GCD.eda.qmsg
mydesign1/db/GCD.eds_overflow
mydesign1/db/GCD.fit.qmsg
mydesign1/db/GCD.hier_info
mydesign1/db/GCD.hif
mydesign1/db/GCD.lpc.html
mydesign1/db/GCD.lpc.rdb
mydesign1/db/GCD.lpc.txt
mydesign1/db/GCD.map.bpm
mydesign1/db/GCD.map.cdb
mydesign1/db/GCD.map.ecobp
mydesign1/db/GCD.map.hdb
mydesign1/db/GCD.map.kpt
mydesign1/db/GCD.map.logdb
mydesign1/db/GCD.map.qmsg
mydesign1/db/GCD.map_bb.cdb
mydesign1/db/GCD.map_bb.hdb
mydesign1/db/GCD.map_bb.logdb
mydesign1/db/GCD.pre_map.cdb
mydesign1/db/GCD.pre_map.hdb
mydesign1/db/GCD.rpp.qmsg
mydesign1/db/GCD.rtlv.hdb
mydesign1/db/GCD.rtlv_sg.cdb
mydesign1/db/GCD.rtlv_sg_swap.cdb
mydesign1/db/GCD.sgate.rvd
mydesign1/db/GCD.sgate_sm.rvd
mydesign1/db/GCD.sgdiff.cdb
mydesign1/db/GCD.sgdiff.hdb
mydesign1/db/GCD.sim.cvwf
mydesign1/db/GCD.sim.hdb
mydesign1/db/GCD.sim.qmsg
mydesign1/db/GCD.sim.rdb
mydesign1/db/GCD.sld_design_entry.sci
mydesign1/db/GCD.sld_design_entry_dsc.sci
mydesign1/db/GCD.smart_action.txt
mydesign1/db/GCD.smp_dump.txt
mydesign1/db/GCD.syn_hier_info
mydesign1/db/GCD.tan.qmsg
mydesign1/db/GCD.tis_db_list.ddb
mydesign1/db/GCD.tmw_info
mydesign1/db/logic_util_heursitic.dat
mydesign1/db/mux_qbc.tdf
mydesign1/db/prev_cmp_GCD.asm.qmsg
mydesign1/db/prev_cmp_GCD.eda.qmsg
mydesign1/db/prev_cmp_GCD.fit.qmsg
mydesign1/db/prev_cmp_GCD.map.qmsg
mydesign1/db/prev_cmp_GCD.qmsg
mydesign1/db/prev_cmp_GCD.sim.qmsg
mydesign1/db/prev_cmp_GCD.tan.qmsg
mydesign1/db/wed.wsf
mydesign1/dc_fsm.v
mydesign1/dc_fsm.v.bak
mydesign1/GCD.asm.rpt
mydesign1/GCD.done
mydesign1/GCD.eda.rpt
mydesign1/GCD.fit.rpt
mydesign1/GCD.fit.smsg
mydesign1/GCD.fit.summary
mydesign1/GCD.flow.rpt
mydesign1/GCD.map.rpt
mydesign1/GCD.map.summary
mydesign1/GCD.pin
mydesign1/GCD.pof
mydesign1/GCD.qpf
mydesign1/GCD.qsf
mydesign1/GCD.qws
mydesign1/GCD.sim.rpt
mydesign1/GCD.sof
mydesign1/GCD.tan.rpt
mydesign1/GCD.tan.summary
mydesign1/GCD.v
mydesign1/GCD.v.bak
mydesign1/GCD.vwf
mydesign1/gcdGCDUnitDpatch_sstr.v
mydesign1/gcdGCDUnitDpatch_sstr.v.bak
mydesign1/GCD_assignment_defaults.qdf
mydesign1/GCD_nativelink_simulation.rpt
mydesign1/GCD_tb.v
mydesign1/GCD_tb.v.bak
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.cdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.dfp
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.hdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.kpt
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.logdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.rcfdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.cmp.re.rcfdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.cdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.dpi
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.hdb
mydesign1/incremental_db/compiled_partitions/GCD.root_partition.map.kpt
mydesign1/incremental_db/README
mydesign1/simulation/modelsim/cycloneii_atoms.v
mydesign1/simulation/modelsim/GCD.sft
mydesign1/simulation/modelsim/GCD.vo
mydesign1/simulation/modelsim/GCD_modelsim.xrf
mydesign1/simulation/modelsim/GCD_run_msim_gate_verilog.do
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak1
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak10
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak11
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak2
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak3
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak4
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak5
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak6
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak7
mydesign1/simulation/modelsim/GCD_run_msim_rtl_verilog.do.bak8
mydesign1/simulation/modelsim/GCD_run_
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