shift_reg/
shift_reg/component/
shift_reg/constraint/
shift_reg/coreconsole/
shift_reg/designer/
shift_reg/designer/impl1/
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shift_reg/designer/impl1/designer_gen_ba.log
shift_reg/designer/impl1/shift_reg.adb
shift_reg/designer/impl1/shift_reg.dtf/
shift_reg/designer/impl1/shift_reg.dtf/verify.log
shift_reg/designer/impl1/shift_reg.ide_des
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shift_reg/designer/impl1/shift_reg.tcl
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shift_reg/designer/impl1/shift_reg_ba.sdf_max.csd
shift_reg/designer/impl1/shift_reg_ba.v
shift_reg/designer/impl1/shift_reg_fp/
shift_reg/designer/impl1/shift_reg_fp/$$FlashPro_FPBBALTLPT1.L$$
shift_reg/designer/impl1/shift_reg_fp/projectData/
shift_reg/designer/impl1/shift_reg_fp/projectData/shift_reg.pdb
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shift_reg/designer/impl1/shift_reg_fp/shift_reg.pro
shift_reg/designer/impl1/simulation/
shift_reg/designer/impl1/simulation/postlayout/
shift_reg/designer/impl1/simulation/postlayout/shift_reg/
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shift_reg/designer/impl1/simulation/postlayout/_info
shift_reg/designer/impl1/simulation/postlayout/_temp/
shift_reg/designer/impl1/simulation/postlayout/_vmake
shift_reg/hdl/
shift_reg/hdl/clk_div.v
shift_reg/hdl/shift_reg.v
shift_reg/phy_synthesis/
shift_reg/shift_reg.prj
shift_reg/simulation/
shift_reg/simulation/modelsim.ini
shift_reg/simulation/modelsim.ini.sav
shift_reg/simulation/modelsim.log
shift_reg/simulation/run.do
shift_reg/simulation/vsim.wlf
shift_reg/smartgen/
shift_reg/smartgen/smartgen.aws
shift_reg/stimulus/
shift_reg/synthesis/
shift_reg/synthesis/.recordref
shift_reg/synthesis/backup/
shift_reg/synthesis/backup/shift_reg.srr
shift_reg/synthesis/coreip/
shift_reg/synthesis/run_options.txt
shift_reg/synthesis/shift_reg.areasrr
shift_reg/synthesis/shift_reg.edn
shift_reg/synthesis/shift_reg.map
shift_reg/synthesis/shift_reg.pdc
shift_reg/synthesis/shift_reg.sdf
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shift_reg/synthesis/shift_reg.srd
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shift_reg/synthesis/shift_reg.srs
shift_reg/synthesis/shift_reg.szr
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shift_reg/synthesis/shift_reg_sdc.sdc
shift_reg/synthesis/shift_reg_syn.prj
shift_reg/synthesis/stdout.log
shift_reg/synthesis/synthesis_identify/
shift_reg/synthesis/synthesis_identify/backup/
shift_reg/synthesis/synthesis_identify/coreip/
shift_reg/synthesis/synthesis_identify/shift_reg.srs
shift_reg/synthesis/synthesis_identify/shift_reg.tlg
shift_reg/synthesis/synthesis_identify/syntmp/
shift_reg/synthesis/syntmp/
shift_reg/synthesis/syntmp/shift_reg.plg
shift_reg/synthesis/traplog.tlg
shift_reg/viewdraw/
shift_reg/viewdraw/sch/
shift_reg/viewdraw/sym/
shift_reg/viewdraw/vf/
shift_reg/viewdraw/vf/project.lst
shift_reg/viewdraw/viewdraw.ini
shift_reg/viewdraw/wir/