论文讨论的是基于VHDL 实现在系统编程平衡GOLD 码逻辑电路设计，给

出周期与相位可编程平衡GOLD 码生成电路设计方案。该方案由最长线性移位寄存器

与可选反馈支路构成。-Discussion paper is based on VHDL programming to achieve a balance in the system logic circuit design GOLD code given cycle and phase balance GOLD programmable code generation circuit design. The program consists of the longest linear feedback shift register with the optional slip form.