nios_lcd_3c120/altpllpll.ppf
nios_lcd_3c120/altpllpll.qip
nios_lcd_3c120/altpllpll.v
nios_lcd_3c120/altpllpll_bb.v
nios_lcd_3c120/alt_mem_phy_defines.v
nios_lcd_3c120/alt_mem_phy_sequencer.vhd
nios_lcd_3c120/auk_ddr_hp_controller.ocp
nios_lcd_3c120/auk_ddr_hp_controller.vhd
nios_lcd_3c120/board_support.tcl
nios_lcd_3c120/button_pio.v
nios_lcd_3c120/common_hpddr_setting.tcl
nios_lcd_3c120/common_kits_setting.tcl
nios_lcd_3c120/common_nios2_setting.tcl
nios_lcd_3c120/common_timequest_setting.tcl
nios_lcd_3c120/common_tse_setting.tcl
nios_lcd_3c120/cpu.ocp
nios_lcd_3c120/cpu.sdc
nios_lcd_3c120/cpu.v
nios_lcd_3c120/cpu_bht_ram.mif
nios_lcd_3c120/cpu_dc_tag_ram.mif
nios_lcd_3c120/cpu_ddr_1_clock_bridge.v
nios_lcd_3c120/cpu_ddr_clock_bridge.v
nios_lcd_3c120/cpu_ic_tag_ram.mif
nios_lcd_3c120/cpu_jtag_debug_module_sysclk.v
nios_lcd_3c120/cpu_jtag_debug_module_tck.v
nios_lcd_3c120/cpu_jtag_debug_module_wrapper.v
nios_lcd_3c120/cpu_mult_cell.v
nios_lcd_3c120/cpu_ociram_default_contents.mif
nios_lcd_3c120/cpu_oci_test_bench.v
nios_lcd_3c120/cpu_rf_ram_a.mif
nios_lcd_3c120/cpu_rf_ram_b.mif
nios_lcd_3c120/cpu_test_bench.v
nios_lcd_3c120/cycloneIII_3c120_niosII_video.done
nios_lcd_3c120/cycloneIII_3c120_niosII_video.fit.smsg
nios_lcd_3c120/cycloneIII_3c120_niosII_video.fit.summary
nios_lcd_3c120/cycloneIII_3c120_niosII_video.jdi
nios_lcd_3c120/cycloneIII_3c120_niosII_video.map.smsg
nios_lcd_3c120/cycloneIII_3c120_niosII_video.map.summary
nios_lcd_3c120/cycloneIII_3c120_niosII_video.pin
nios_lcd_3c120/cycloneIII_3c120_niosII_video.qpf
nios_lcd_3c120/cycloneIII_3c120_niosII_video.qsf
nios_lcd_3c120/cycloneIII_3c120_niosII_video.qws
nios_lcd_3c120/cycloneIII_3c120_niosII_video.sdc
nios_lcd_3c120/cycloneIII_3c120_niosII_video.sof
nios_lcd_3c120/cycloneIII_3c120_niosII_video.sopc.tcl
nios_lcd_3c120/cycloneIII_3c120_niosII_video.sta.summary
nios_lcd_3c120/cycloneIII_3c120_niosII_video.v
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.bsf
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.debug.tcl
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.ptf
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.ptf.8.0
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.ptf.bak
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.ptf.pre_generation_ptf
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.qip
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.sopc
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.sopcinfo
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc.v
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc_clock_0.v
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc_generation_script
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc_log.txt
nios_lcd_3c120/cycloneIII_3c120_niosII_video_sopc_setup_quartus.tcl
nios_lcd_3c120/ddr2_sdram.html
nios_lcd_3c120/ddr2_sdram.ppf
nios_lcd_3c120/ddr2_sdram.qip
nios_lcd_3c120/ddr2_sdram.v
nios_lcd_3c120/ddr2_sdram_1.html
nios_lcd_3c120/ddr2_sdram_1.ppf
nios_lcd_3c120/ddr2_sdram_1.qip
nios_lcd_3c120/ddr2_sdram_1.v
nios_lcd_3c120/ddr2_sdram_1_advisor.ipa
nios_lcd_3c120/ddr2_sdram_1_auk_ddr_hp_controller_wrapper.v
nios_lcd_3c120/ddr2_sdram_1_controller_phy.v
nios_lcd_3c120/ddr2_sdram_1_example_driver.v
nios_lcd_3c120/ddr2_sdram_1_example_top.sdc
nios_lcd_3c120/ddr2_sdram_1_example_top.v
nios_lcd_3c120/ddr2_sdram_1_ex_lfsr8.v
nios_lcd_3c120/ddr2_sdram_1_phy.html
nios_lcd_3c120/ddr2_sdram_1_phy.qip
nios_lcd_3c120/ddr2_sdram_1_phy.v
nios_lcd_3c120/ddr2_sdram_1_phy_alt_mem_phy.v
nios_lcd_3c120/ddr2_sdram_1_phy_alt_mem_phy_pll.ppf
nios_lcd_3c120/ddr2_sdram_1_phy_alt_mem_phy_pll.qip
nios_lcd_3c120/ddr2_sdram_1_phy_alt_mem_phy_pll.v
nios_lcd_3c120/ddr2_sdram_1_phy_alt_mem_phy_pll.v_.bak
nios_lcd_3c120/ddr2_sdram_1_phy_alt_mem_phy_pll_bb.v
nios_lcd_3c120/ddr2_sdram_1_phy_alt_mem_phy_sequencer_wrapper.v
nios_lcd_3c120/ddr2_sdram_1_phy_autodetectedpins.tcl
nios_lcd_3c120/ddr2_sdram_1_phy_ddr_pins.tcl
nios_lcd_3c120/ddr2_sdram_1_phy_ddr_timing.sdc
nios_lcd_3c120/ddr2_sdram_1_phy_report_timing.tcl
nios_lcd_3c120/ddr2_sdram_1_phy_simgen_init.txt
nios_lcd_3c120/ddr2_sdram_1_phy_summary.csv
nios_lcd_3c120/ddr2_sdram_1_pin_assignments.tcl
nios_lcd_3c120/ddr2_sdram_advisor.ipa
nios_lcd_3c120/ddr2_sdram_auk_ddr_hp_controller_wrapper.v
nios_lcd_3c120/ddr2_sdram_controller_phy.v
nios_lcd_3c120/ddr2_sdram_example_driver.v
nios_lcd_3c120/ddr2_sdram_example_top.sdc
nios_lcd_3c120/ddr2_sdram_example_top.v
nios_lcd_3c120/ddr2_sdram_ex_lfsr8.v
nios_lcd_3c120/ddr2_sdram_phy.html
nios_lcd_3c120/ddr2_sdram_phy.qip
nios_lcd_3c120/ddr2_sdram_phy.v
nios_lcd_3c120/ddr2_sdram_phy_alt_mem_phy.v
nios_lcd_3c120/ddr2_sdram_phy_alt_mem_phy_pll.ppf
nios_lcd_3c120/ddr2_sdram_phy_alt_mem_phy_pll.qip
nios_lcd_3c120/ddr2_sdram_phy_alt_mem_phy_pll.v
nios_lcd_3c120/ddr2_sdram_phy_alt_mem_phy_pll.v_.bak
nios_lcd_3c120/ddr2_sdram_phy_alt_mem_phy_pll_bb.v
nios_lcd_3c120/ddr2_sdram_phy_alt_mem_phy_sequencer_wrapper.v
nios_lcd_3c120/ddr2_sdram_phy_autodetectedpins.tcl
nios_lcd_3c120/ddr2_sdram_phy_ddr_pins.tcl
nios_lcd_3c120/ddr2_sdram_phy_ddr_timing.sdc
nios_lcd_3c120/ddr2_sdram_phy_report_timing.tcl
nios_lcd_3c120/ddr2_sdram_phy_simgen_init.txt
nios_lcd_3c120/ddr2_s