D_latch/designer/impl1/designer.log
D_latch/designer/impl1/D_latch.adb
D_latch/designer/impl1/D_latch.dat
D_latch/designer/impl1/D_latch.dtf/verify.log
D_latch/designer/impl1/D_latch.ide_des
D_latch/designer/impl1/D_latch.pdb
D_latch/designer/impl1/D_latch.pdb.depends
D_latch/designer/impl1/D_latch.stp
D_latch/designer/impl1/D_latch.tcl
D_latch/D_latch.prj
D_latch/hdl/D_latch.v
D_latch/simulation/modelsim.ini
D_latch/smartgen/smartgen.aws
D_latch/synthesis/D_latch.areasrr
D_latch/synthesis/D_latch.edn
D_latch/synthesis/D_latch.fse
D_latch/synthesis/D_latch.htm
D_latch/synthesis/D_latch.map
D_latch/synthesis/D_latch.pdc
D_latch/synthesis/D_latch.sap
D_latch/synthesis/D_latch.sdf
D_latch/synthesis/D_latch.so
D_latch/synthesis/D_latch.srd
D_latch/synthesis/D_latch.srm
D_latch/synthesis/D_latch.srr
D_latch/synthesis/D_latch.srs
D_latch/synthesis/D_latch.szr
D_latch/synthesis/D_latch.tlg
D_latch/synthesis/D_latch_sdc.sdc
D_latch/synthesis/D_latch_syn.prj
D_latch/synthesis/run_options.txt
D_latch/synthesis/stdout.log
D_latch/synthesis/syntmp/D_latch.plg
D_latch/synthesis/syntmp/D_latch_flink.htm
D_latch/synthesis/syntmp/D_latch_srr.htm
D_latch/synthesis/syntmp/D_latch_toc.htm
D_latch/synthesis/syntmp/sap.log
D_latch/viewdraw/vf/project.lst
D_latch/viewdraw/viewdraw.ini
D_latch/designer/impl1/D_latch.dtf
D_latch/designer/impl1/simulation
D_latch/designer/impl1
D_latch/synthesis/backup
D_latch/synthesis/coreip
D_latch/synthesis/syntmp
D_latch/viewdraw/sch
D_latch/viewdraw/sym
D_latch/viewdraw/vf
D_latch/viewdraw/wir
D_latch/component
D_latch/constraint
D_latch/coreconsole
D_latch/designer
D_latch/hdl
D_latch/phy_synthesis
D_latch/simulation
D_latch/smartgen
D_latch/stimulus
D_latch/synthesis
D_latch/viewdraw
D_latch