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文件名称:DE0_VGA

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    2.21mb
  • 已下载：
    0次
  • 提 供 者：
    李****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于fpga的VGA程序代码，已经测试成功-VGA-based fpga code has been tested successfully

相关搜索： de DE0 VGA VGA IP DE

(系统自动生成,下载前可以参看下载内容)

下载文件列表

DE0_VGA/.sopc_builder/filters.xml
DE0_VGA/db/DE0_VGA.(0).cnf.cdb
DE0_VGA/db/DE0_VGA.(0).cnf.hdb
DE0_VGA/db/DE0_VGA.(1).cnf.cdb
DE0_VGA/db/DE0_VGA.(1).cnf.hdb
DE0_VGA/db/DE0_VGA.(2).cnf.cdb
DE0_VGA/db/DE0_VGA.(2).cnf.hdb
DE0_VGA/db/DE0_VGA.(3).cnf.cdb
DE0_VGA/db/DE0_VGA.(3).cnf.hdb
DE0_VGA/db/DE0_VGA.(4).cnf.cdb
DE0_VGA/db/DE0_VGA.(4).cnf.hdb
DE0_VGA/db/DE0_VGA.(5).cnf.cdb
DE0_VGA/db/DE0_VGA.(5).cnf.hdb
DE0_VGA/db/DE0_VGA.asm.qmsg
DE0_VGA/db/DE0_VGA.asm.rdb
DE0_VGA/db/DE0_VGA.asm_labs.ddb
DE0_VGA/db/DE0_VGA.cbx.xml
DE0_VGA/db/DE0_VGA.cmp.bpm
DE0_VGA/db/DE0_VGA.cmp.cbp
DE0_VGA/db/DE0_VGA.cmp.cdb
DE0_VGA/db/DE0_VGA.cmp.ecobp
DE0_VGA/db/DE0_VGA.cmp.hdb
DE0_VGA/db/DE0_VGA.cmp.kpt
DE0_VGA/db/DE0_VGA.cmp.logdb
DE0_VGA/db/DE0_VGA.cmp.rdb
DE0_VGA/db/DE0_VGA.cmp_merge.kpt
DE0_VGA/db/DE0_VGA.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
DE0_VGA/db/DE0_VGA.cuda_io_sim_cache.31um_tt_1200mv_85c_slow.hsd
DE0_VGA/db/DE0_VGA.db_info
DE0_VGA/db/DE0_VGA.eco.cdb
DE0_VGA/db/DE0_VGA.fit.qmsg
DE0_VGA/db/DE0_VGA.hier_info
DE0_VGA/db/DE0_VGA.hif
DE0_VGA/db/DE0_VGA.lpc.html
DE0_VGA/db/DE0_VGA.lpc.rdb
DE0_VGA/db/DE0_VGA.lpc.txt
DE0_VGA/db/DE0_VGA.map.bpm
DE0_VGA/db/DE0_VGA.map.cdb
DE0_VGA/db/DE0_VGA.map.ecobp
DE0_VGA/db/DE0_VGA.map.hdb
DE0_VGA/db/DE0_VGA.map.kpt
DE0_VGA/db/DE0_VGA.map.logdb
DE0_VGA/db/DE0_VGA.map.qmsg
DE0_VGA/db/DE0_VGA.map_bb.cdb
DE0_VGA/db/DE0_VGA.map_bb.hdb
DE0_VGA/db/DE0_VGA.map_bb.logdb
DE0_VGA/db/DE0_VGA.pre_map.cdb
DE0_VGA/db/DE0_VGA.pre_map.hdb
DE0_VGA/db/DE0_VGA.rpp.qmsg
DE0_VGA/db/DE0_VGA.rtlv.hdb
DE0_VGA/db/DE0_VGA.rtlv_sg.cdb
DE0_VGA/db/DE0_VGA.rtlv_sg_swap.cdb
DE0_VGA/db/DE0_VGA.sgate.rvd
DE0_VGA/db/DE0_VGA.sgate_sm.rvd
DE0_VGA/db/DE0_VGA.sgdiff.cdb
DE0_VGA/db/DE0_VGA.sgdiff.hdb
DE0_VGA/db/DE0_VGA.sld_design_entry.sci
DE0_VGA/db/DE0_VGA.sld_design_entry_dsc.sci
DE0_VGA/db/DE0_VGA.smart_action.txt
DE0_VGA/db/DE0_VGA.sta.qmsg
DE0_VGA/db/DE0_VGA.sta.rdb
DE0_VGA/db/DE0_VGA.sta_cmp.6_slow_1200mv_85c.tdb
DE0_VGA/db/DE0_VGA.syn_hier_info
DE0_VGA/db/DE0_VGA.tiscmp.fast_1200mv_0c.ddb
DE0_VGA/db/DE0_VGA.tiscmp.slow_1200mv_0c.ddb
DE0_VGA/db/DE0_VGA.tiscmp.slow_1200mv_85c.ddb
DE0_VGA/db/DE0_VGA.tis_db_list.ddb
DE0_VGA/db/logic_util_heursitic.dat
DE0_VGA/db/prev_cmp_DE0_VGA.asm.qmsg
DE0_VGA/db/prev_cmp_DE0_VGA.fit.qmsg
DE0_VGA/db/prev_cmp_DE0_VGA.map.qmsg
DE0_VGA/db/prev_cmp_DE0_VGA.sta.qmsg
DE0_VGA/db/VGA_CLK_altpll.v
DE0_VGA/DE0_VGA.asm.rpt
DE0_VGA/DE0_VGA.done
DE0_VGA/DE0_VGA.fit.rpt
DE0_VGA/DE0_VGA.fit.smsg
DE0_VGA/DE0_VGA.fit.summary
DE0_VGA/DE0_VGA.flow.rpt
DE0_VGA/DE0_VGA.map.rpt
DE0_VGA/DE0_VGA.map.summary
DE0_VGA/DE0_VGA.pin
DE0_VGA/DE0_VGA.qpf
DE0_VGA/DE0_VGA.qsf
DE0_VGA/DE0_VGA.qws
DE0_VGA/DE0_VGA.sof
DE0_VGA/DE0_VGA.sta.rpt
DE0_VGA/DE0_VGA.sta.summary
DE0_VGA/DE0_VGA.v
DE0_VGA/DE0_VGA_assignment_defaults.qdf
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.atm
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.cdb
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.dfp
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.hdb
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.hdbx
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.kpt
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.logdb
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.rcf
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.rcfdb
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.cmp.re.rcfdb
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.map.atm
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.map.cdb
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.map.dpi
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.map.hdb
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.map.hdbx
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.map.kpt
DE0_VGA/incremental_db/compiled_partitions/DE0_VGA.root_partition.merge_hb.atm
DE0_VGA/incremental_db/README
DE0_VGA/PLLJ_PLLSPE_INFO.txt
DE0_VGA/sopc_builder_log.txt
DE0_VGA/V/VGA_CLK.v
DE0_VGA/V/VGA_Ctrl.v
DE0_VGA/V/VGA_Pattern.v
DE0_VGA/incremental_db/compiled_partitions
DE0_VGA/.sopc_builder
DE0_VGA/db
DE0_VGA/incremental_db
DE0_VGA/V
DE0_VGA

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