Verilog_hw_problem2/verilog_problem_1/device_usage_statistics.html
Verilog_hw_problem2/verilog_problem_1/fuse.log
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/GDBMI-In.txt
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/GDBMI-Out.txt
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/isimcrash.log
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/isimkernel.log
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/netId.dat
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/test_fx_3_isim_beh.exe
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/tmp_save/_1
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000000751492074_2073120511.c
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000000751492074_2073120511.didat
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000000751492074_2073120511.nt.obj
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000003271890328_2799730620.c
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000003271890328_2799730620.didat
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000003271890328_2799730620.nt.obj
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000003979845315_2831935132.c
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000003979845315_2831935132.didat
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/m_00000000003979845315_2831935132.nt.obj
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/test_fx_3_isim_beh.exe_main.c
Verilog_hw_problem2/verilog_problem_1/isim/test_fx_3_isim_beh.exe.sim/work/test_fx_3_isim_beh.exe_main.nt.obj
Verilog_hw_problem2/verilog_problem_1/isim/work/glbl.sdb
Verilog_hw_problem2/verilog_problem_1/isim/work/simple.sdb
Verilog_hw_problem2/verilog_problem_1/isim/work/test_fx_3.sdb
Verilog_hw_problem2/verilog_problem_1/isim.cmd
Verilog_hw_problem2/verilog_problem_1/isim.log
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.bgn
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.bit
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.bld
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.drc
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.ncd
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.ngd
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.pad
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.par
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.pcf
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.ptwx
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.twr
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.twx
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.unroutes
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.ut
Verilog_hw_problem2/verilog_problem_1/moore_state_machine.xpi
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_guide.ncd
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_map.map
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_map.mrp
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_map.ncd
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_map.ngm
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_map.xrpt
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_ngdbuild.xrpt
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_pad.csv
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_pad.txt
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_par.xrpt
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_prev_built.ngd
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_summary.html
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_summary.xml
Verilog_hw_problem2/verilog_problem_1/moore_state_machine_usage.xml
Verilog_hw_problem2/verilog_problem_1/simple.bgn
Verilog_hw_problem2/verilog_problem_1/simple.bit
Verilog_hw_problem2/verilog_problem_1/simple.bld
Verilog_hw_problem2/verilog_problem_1/simple.cmd_log
Verilog_hw_problem2/verilog_problem_1/simple.drc
Verilog_hw_problem2/verilog_problem_1/simple.lso
Verilog_hw_problem2/verilog_problem_1/simple.ncd
Verilog_hw_problem2/verilog_problem_1/simple.ngc
Verilog_hw_problem2/verilog_problem_1/simple.ngd
Verilog_hw_problem2/verilog_problem_1/simple.ngr
Verilog_hw_problem2/verilog_problem_1/simple.pad
Verilog_hw_problem2/verilog_problem_1/simple.par
Verilog_hw_problem2/verilog_problem_1/simple.pcf
Verilog_hw_problem2/verilog_problem_1/simple.prj
Verilog_hw_problem2/verilog_problem_1/simple.ptwx
Verilog_hw_problem2/verilog_problem_1/simple.stx
Verilog_hw_problem2/verilog_problem_1/simple.syr
Verilog_hw_problem2/verilog_problem_1/simple.twr
Verilog_hw_problem2/verilog