文件名称:opencores_i2c
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- 上传时间：2012-11-16
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文件大小：222.65kb
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I2C 总线协议通过两线串行数据SDA 和串行时钟SCL 线在连接到总线的器件间传递信息,每个器件都有一个唯一的地址识别,而且都可以作为一个发送器或接收器.-Through the two-wire I2C serial bus protocol data SDA and serial clock SCL line is connected to the bus transfer information between devices, each device has a unique address identification, and can be used as a transmitter or receiver.
相关搜索： i2c
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下载文件列表
opencores_i2c/class.ptf.old
opencores_i2c/db/
opencores_i2c/db/i2c_master_top.(0).cnf.cdb
opencores_i2c/db/i2c_master_top.(0).cnf.hdb
opencores_i2c/db/i2c_master_top.(1).cnf.cdb
opencores_i2c/db/i2c_master_top.(1).cnf.hdb
opencores_i2c/db/i2c_master_top.(2).cnf.cdb
opencores_i2c/db/i2c_master_top.(2).cnf.hdb
opencores_i2c/db/i2c_master_top.analyze_file.qmsg
opencores_i2c/db/i2c_master_top.cbx.xml
opencores_i2c/db/i2c_master_top.cmp.rdb
opencores_i2c/db/i2c_master_top.db_info
opencores_i2c/db/i2c_master_top.eco.cdb
opencores_i2c/db/i2c_master_top.hier_info
opencores_i2c/db/i2c_master_top.hif
opencores_i2c/db/i2c_master_top.map.qmsg
opencores_i2c/db/i2c_master_top.map_bb.hdb
opencores_i2c/db/i2c_master_top.map_bb.hdbx
opencores_i2c/db/i2c_master_top.pre_map.cdb
opencores_i2c/db/i2c_master_top.pre_map.hdb
opencores_i2c/db/i2c_master_top.psp
opencores_i2c/db/i2c_master_top.rpp.qmsg
opencores_i2c/db/i2c_master_top.rtlv.hdb
opencores_i2c/db/i2c_master_top.rtlv_sg.cdb
opencores_i2c/db/i2c_master_top.rtlv_sg_swap.cdb
opencores_i2c/db/i2c_master_top.sgate.rvd
opencores_i2c/db/i2c_master_top.sgate_sm.rvd
opencores_i2c/db/i2c_master_top.sld_design_entry.sci
opencores_i2c/db/i2c_master_top.sld_design_entry_dsc.sci
opencores_i2c/db/i2c_master_top.tis_db_list.ddb
opencores_i2c/db/prev_cmp_i2c_master_top.map.qmsg
opencores_i2c/db/prev_cmp_i2c_master_top.qmsg
opencores_i2c/Docs/
opencores_i2c/Docs/I2C_tests.c
opencores_i2c/HAL/
opencores_i2c/HAL/inc/
opencores_i2c/HAL/inc/opencores_i2c.h
opencores_i2c/HAL/src/
opencores_i2c/HAL/src/component.mk
opencores_i2c/HAL/src/opencores_i2c.c
opencores_i2c/i2c_master_bit_ctrl.v
opencores_i2c/i2c_master_byte_ctrl.v
opencores_i2c/i2c_master_defines.v
opencores_i2c/i2c_master_top.done
opencores_i2c/i2c_master_top.flow.rpt
opencores_i2c/i2c_master_top.map.rpt
opencores_i2c/i2c_master_top.map.summary
opencores_i2c/i2c_master_top.qpf
opencores_i2c/i2c_master_top.qsf
opencores_i2c/i2c_master_top.qws
opencores_i2c/i2c_master_top.v
opencores_i2c/inc/
opencores_i2c/inc/opencores_i2c_regs.h
opencores_i2c/opencores_i2c.v
opencores_i2c/opencores_i2c.v~
opencores_i2c/opencores_i2c_hw.tcl
opencores_i2c/opencores_i2c_hw.tcl.old
opencores_i2c/opencores_i2c_hw.tcl~
opencores_i2c/timescale.v
opencores_i2c/db/
opencores_i2c/db/i2c_master_top.(0).cnf.cdb
opencores_i2c/db/i2c_master_top.(0).cnf.hdb
opencores_i2c/db/i2c_master_top.(1).cnf.cdb
opencores_i2c/db/i2c_master_top.(1).cnf.hdb
opencores_i2c/db/i2c_master_top.(2).cnf.cdb
opencores_i2c/db/i2c_master_top.(2).cnf.hdb
opencores_i2c/db/i2c_master_top.analyze_file.qmsg
opencores_i2c/db/i2c_master_top.cbx.xml
opencores_i2c/db/i2c_master_top.cmp.rdb
opencores_i2c/db/i2c_master_top.db_info
opencores_i2c/db/i2c_master_top.eco.cdb
opencores_i2c/db/i2c_master_top.hier_info
opencores_i2c/db/i2c_master_top.hif
opencores_i2c/db/i2c_master_top.map.qmsg
opencores_i2c/db/i2c_master_top.map_bb.hdb
opencores_i2c/db/i2c_master_top.map_bb.hdbx
opencores_i2c/db/i2c_master_top.pre_map.cdb
opencores_i2c/db/i2c_master_top.pre_map.hdb
opencores_i2c/db/i2c_master_top.psp
opencores_i2c/db/i2c_master_top.rpp.qmsg
opencores_i2c/db/i2c_master_top.rtlv.hdb
opencores_i2c/db/i2c_master_top.rtlv_sg.cdb
opencores_i2c/db/i2c_master_top.rtlv_sg_swap.cdb
opencores_i2c/db/i2c_master_top.sgate.rvd
opencores_i2c/db/i2c_master_top.sgate_sm.rvd
opencores_i2c/db/i2c_master_top.sld_design_entry.sci
opencores_i2c/db/i2c_master_top.sld_design_entry_dsc.sci
opencores_i2c/db/i2c_master_top.tis_db_list.ddb
opencores_i2c/db/prev_cmp_i2c_master_top.map.qmsg
opencores_i2c/db/prev_cmp_i2c_master_top.qmsg
opencores_i2c/Docs/
opencores_i2c/Docs/I2C_tests.c
opencores_i2c/HAL/
opencores_i2c/HAL/inc/
opencores_i2c/HAL/inc/opencores_i2c.h
opencores_i2c/HAL/src/
opencores_i2c/HAL/src/component.mk
opencores_i2c/HAL/src/opencores_i2c.c
opencores_i2c/i2c_master_bit_ctrl.v
opencores_i2c/i2c_master_byte_ctrl.v
opencores_i2c/i2c_master_defines.v
opencores_i2c/i2c_master_top.done
opencores_i2c/i2c_master_top.flow.rpt
opencores_i2c/i2c_master_top.map.rpt
opencores_i2c/i2c_master_top.map.summary
opencores_i2c/i2c_master_top.qpf
opencores_i2c/i2c_master_top.qsf
opencores_i2c/i2c_master_top.qws
opencores_i2c/i2c_master_top.v
opencores_i2c/inc/
opencores_i2c/inc/opencores_i2c_regs.h
opencores_i2c/opencores_i2c.v
opencores_i2c/opencores_i2c.v~
opencores_i2c/opencores_i2c_hw.tcl
opencores_i2c/opencores_i2c_hw.tcl.old
opencores_i2c/opencores_i2c_hw.tcl~
opencores_i2c/timescale.v
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